diff options
| author | Yongqiang Niu <yongqiang.niu@mediatek.com> | 2021-01-31 13:10:58 +0800 |
|---|---|---|
| committer | Chun-Kuang Hu <chunkuang.hu@kernel.org> | 2021-02-04 22:55:46 +0800 |
| commit | 49629304b91fc7cdc484bb82047a8b97ae3978db (patch) | |
| tree | a45ede0d1eb7dd6f8e4a8174ae06aa62ecee0092 | |
| parent | d41ff4dcf093885dcc253e3861834eea294827cb (diff) | |
drm/mediatek: Enable dither function
Enable dither function to improve the display quality.
Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
| -rw-r--r-- | drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c index c730029ac8fc..1b1a30535462 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c @@ -53,6 +53,7 @@ #define DITHER_EN BIT(0) #define DISP_DITHER_CFG 0x0020 #define DITHER_RELAY_MODE BIT(0) +#define DITHER_ENGINE_EN BIT(1) #define DISP_DITHER_SIZE 0x0030 #define LUT_10BIT_MASK 0x03ff @@ -317,6 +318,8 @@ static void mtk_dither_config(struct device *dev, unsigned int w, mtk_ddp_write(cmdq_pkt, h << 16 | w, &priv->cmdq_reg, priv->regs, DISP_DITHER_SIZE); mtk_ddp_write(cmdq_pkt, DITHER_RELAY_MODE, &priv->cmdq_reg, priv->regs, DISP_DITHER_CFG); + mtk_dither_set_common(priv->regs, &priv->cmdq_reg, bpc, DISP_DITHER_CFG, + DITHER_ENGINE_EN, cmdq_pkt); } static void mtk_dither_start(struct device *dev) |