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authorJohn Garry <john.garry@huawei.com>2016-09-06 23:36:21 +0800
committerMartin K. Petersen <martin.petersen@oracle.com>2016-09-14 12:54:18 -0400
commit44c4abe08f224817747795fb8d0677888166e4cd (patch)
tree73b5dc7dc69982586483747df5db29f1714ede4d
parentd82debecf29b4d89e2d17a52dc32c745ba97c999 (diff)
scsi: hisi_sas: fix HBA SAS addr endianness for v1 hw
The endianness for the SAS address in the TX_ID_DWORD registers is set incorrectly. We see errors like this in the boot log for v2 hw (which would have the same issue as v1 hw): [ 7.583284] sas: target proto 0x0 at 50000d1108e7923f:0x1f not handled This is due to the host SAS addr not matching the PHY SAS addr in the expander host-attached phy discovery responses. To fix, we byte swap the SAS addr from BE to LE (which is the endianness of the SAS controller). Signed-off-by: John Garry <john.garry@huawei.com> Signed-off-by: Xiang Chen <chenxiang66@hisilicon.com> Reviewed-by: Hannes Reinecke <hare@suse.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
-rw-r--r--drivers/scsi/hisi_sas/hisi_sas_v1_hw.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/scsi/hisi_sas/hisi_sas_v1_hw.c b/drivers/scsi/hisi_sas/hisi_sas_v1_hw.c
index b5374641bdb0..c030df08596e 100644
--- a/drivers/scsi/hisi_sas/hisi_sas_v1_hw.c
+++ b/drivers/scsi/hisi_sas/hisi_sas_v1_hw.c
@@ -490,13 +490,13 @@ static void config_id_frame_v1_hw(struct hisi_hba *hisi_hba, int phy_no)
hisi_sas_phy_write32(hisi_hba, phy_no, TX_ID_DWORD0,
__swab32(identify_buffer[0]));
hisi_sas_phy_write32(hisi_hba, phy_no, TX_ID_DWORD1,
- identify_buffer[2]);
+ __swab32(identify_buffer[1]));
hisi_sas_phy_write32(hisi_hba, phy_no, TX_ID_DWORD2,
- identify_buffer[1]);
+ __swab32(identify_buffer[2]));
hisi_sas_phy_write32(hisi_hba, phy_no, TX_ID_DWORD3,
- identify_buffer[4]);
+ __swab32(identify_buffer[3]));
hisi_sas_phy_write32(hisi_hba, phy_no, TX_ID_DWORD4,
- identify_buffer[3]);
+ __swab32(identify_buffer[4]));
hisi_sas_phy_write32(hisi_hba, phy_no, TX_ID_DWORD5,
__swab32(identify_buffer[5]));
}