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author | Olof Johansson <olof@lixom.net> | 2020-09-13 11:33:41 -0700 |
---|---|---|
committer | Olof Johansson <olof@lixom.net> | 2020-09-13 11:33:43 -0700 |
commit | 439a95a044223972a9128d32df7f78f56c99ef51 (patch) | |
tree | dffd5ea19bfa67568ed6b4d79348aca49926ee35 | |
parent | b5ac61e4483f8291f921ccd6e3389cbfee8052c4 (diff) | |
parent | 48d5732cdf57b82ff32d198f7e696386979f8b08 (diff) |
Merge tag 'dt-schema-5.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt
Various minor cleanups for ARM DTS
Cleanup ARM DTS to remove dtschema validation errors.
* tag 'dt-schema-5.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: dts: alpine: Align GIC nodename with dtschema
ARM: dts: zx: Align L2 cache-controller nodename with dtschema
ARM: dts: tango: Align L2 cache-controller nodename with dtschema
ARM: dts: spear: Align L2 cache-controller nodename with dtschema
ARM: dts: qcom: Align L2 cache-controller nodename with dtschema
ARM: dts: prima: Align L2 cache-controller nodename with dtschema
Link: https://lore.kernel.org/r/20200911155509.1495-2-krzk@kernel.org
Signed-off-by: Olof Johansson <olof@lixom.net>
-rw-r--r-- | arch/arm/boot/dts/alpine.dtsi | 2 | ||||
-rw-r--r-- | arch/arm/boot/dts/prima2.dtsi | 2 | ||||
-rw-r--r-- | arch/arm/boot/dts/qcom-mdm9615.dtsi | 2 | ||||
-rw-r--r-- | arch/arm/boot/dts/spear13xx.dtsi | 2 | ||||
-rw-r--r-- | arch/arm/boot/dts/tango4-common.dtsi | 2 | ||||
-rw-r--r-- | arch/arm/boot/dts/zx296702.dtsi | 2 |
6 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm/boot/dts/alpine.dtsi b/arch/arm/boot/dts/alpine.dtsi index d3036ea823d1..3b0675a1c460 100644 --- a/arch/arm/boot/dts/alpine.dtsi +++ b/arch/arm/boot/dts/alpine.dtsi @@ -91,7 +91,7 @@ }; /* Interrupt Controller */ - gic: gic@fb001000 { + gic: interrupt-controller@fb001000 { compatible = "arm,cortex-a15-gic"; #interrupt-cells = <3>; #size-cells = <0>; diff --git a/arch/arm/boot/dts/prima2.dtsi b/arch/arm/boot/dts/prima2.dtsi index 9c7b46b90c3c..7d3d93c22ed9 100644 --- a/arch/arm/boot/dts/prima2.dtsi +++ b/arch/arm/boot/dts/prima2.dtsi @@ -50,7 +50,7 @@ #size-cells = <1>; ranges = <0x40000000 0x40000000 0x80000000>; - l2-cache-controller@80040000 { + cache-controller@80040000 { compatible = "arm,pl310-cache"; reg = <0x80040000 0x1000>; interrupts = <59>; diff --git a/arch/arm/boot/dts/qcom-mdm9615.dtsi b/arch/arm/boot/dts/qcom-mdm9615.dtsi index 347b4f7d7889..dda2ceec6591 100644 --- a/arch/arm/boot/dts/qcom-mdm9615.dtsi +++ b/arch/arm/boot/dts/qcom-mdm9615.dtsi @@ -98,7 +98,7 @@ ranges; compatible = "simple-bus"; - L2: l2-cache@2040000 { + L2: cache-controller@2040000 { compatible = "arm,pl310-cache"; reg = <0x02040000 0x1000>; arm,data-latency = <2 2 0>; diff --git a/arch/arm/boot/dts/spear13xx.dtsi b/arch/arm/boot/dts/spear13xx.dtsi index f187da4485f4..c87b881b2c8b 100644 --- a/arch/arm/boot/dts/spear13xx.dtsi +++ b/arch/arm/boot/dts/spear13xx.dtsi @@ -43,7 +43,7 @@ 0 7 0x04>; }; - L2: l2-cache { + L2: cache-controller { compatible = "arm,pl310-cache"; reg = <0xed000000 0x1000>; cache-unified; diff --git a/arch/arm/boot/dts/tango4-common.dtsi b/arch/arm/boot/dts/tango4-common.dtsi index 54fd522badfc..d584da314500 100644 --- a/arch/arm/boot/dts/tango4-common.dtsi +++ b/arch/arm/boot/dts/tango4-common.dtsi @@ -51,7 +51,7 @@ }; }; - l2cc: l2-cache-controller@20100000 { + l2cc: cache-controller@20100000 { compatible = "arm,pl310-cache"; reg = <0x20100000 0x1000>; cache-level = <2>; diff --git a/arch/arm/boot/dts/zx296702.dtsi b/arch/arm/boot/dts/zx296702.dtsi index afd98de029be..f378c661b3bf 100644 --- a/arch/arm/boot/dts/zx296702.dtsi +++ b/arch/arm/boot/dts/zx296702.dtsi @@ -58,7 +58,7 @@ clocks = <&topclk ZX296702_A9_PERIPHCLK>; }; - l2cc: l2-cache-controller@c00000 { + l2cc: cache-controller@c00000 { compatible = "arm,pl310-cache"; reg = <0x00c00000 0x1000>; cache-unified; |