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authorJonghwan Choi <jhbird.choi@samsung.com>2012-04-05 22:31:31 -0700
committerKukjin Kim <kgene.kim@samsung.com>2012-04-08 17:14:53 -0700
commit32db797f10d465365a52d269c0b313b6b702e711 (patch)
treef1f6cc11ba3e835f94d8ab5ffb3ea485dd1afa59
parent0d923490f7dd5d96bc894a09a178117442b8795b (diff)
ARM: EXYNOS: Fix compile error in exynos5250-cpufreq.c
This patch is omitted in v2 patch of Jaecheol Lee. drivers/cpufreq/exynos5250-cpufreq.c: In function 'set_clkdiv': drivers/cpufreq/exynos5250-cpufreq.c:144: error: 'EXYNOS5_CLKDIV_STATCPU0' undeclared (first use in this function) drivers/cpufreq/exynos5250-cpufreq.c:144: error: (Each undeclared identifier is reported only once drivers/cpufreq/exynos5250-cpufreq.c:144: error: for each function it appears in.) drivers/cpufreq/exynos5250-cpufreq.c:150: error: 'EXYNOS5_CLKDIV_CPU1' undeclared (first use in this function) drivers/cpufreq/exynos5250-cpufreq.c:152: error: 'EXYNOS5_CLKDIV_STATCPU1' undeclared (first use in this function) drivers/cpufreq/exynos5250-cpufreq.c: In function 'set_apll': drivers/cpufreq/exynos5250-cpufreq.c:166: error: 'EXYNOS5_CLKMUX_STATCPU' undeclared (first use in this function) drivers/cpufreq/exynos5250-cpufreq.c:173: error: 'EXYNOS5_APLL_LOCK' undeclared (first use in this function) drivers/cpufreq/exynos5250-cpufreq.c: In function 'exynos5250_cpufreq_init': drivers/cpufreq/exynos5250-cpufreq.c:312: error: 'EXYNOS5_CLKDIV_CPU1' undeclared (first use in this function) Cc: Jaecheol Lee <jc.lee@samsung.com> Signed-off-by: Jonghwan Choi <jhbird.choi@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
-rw-r--r--arch/arm/mach-exynos/include/mach/regs-clock.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/mach-exynos/include/mach/regs-clock.h b/arch/arm/mach-exynos/include/mach/regs-clock.h
index e141c1fd68d8..d9578a58ae7f 100644
--- a/arch/arm/mach-exynos/include/mach/regs-clock.h
+++ b/arch/arm/mach-exynos/include/mach/regs-clock.h
@@ -255,9 +255,15 @@
/* For EXYNOS5250 */
+#define EXYNOS5_APLL_LOCK EXYNOS_CLKREG(0x00000)
#define EXYNOS5_APLL_CON0 EXYNOS_CLKREG(0x00100)
#define EXYNOS5_CLKSRC_CPU EXYNOS_CLKREG(0x00200)
+#define EXYNOS5_CLKMUX_STATCPU EXYNOS_CLKREG(0x00400)
#define EXYNOS5_CLKDIV_CPU0 EXYNOS_CLKREG(0x00500)
+#define EXYNOS5_CLKDIV_CPU1 EXYNOS_CLKREG(0x00504)
+#define EXYNOS5_CLKDIV_STATCPU0 EXYNOS_CLKREG(0x00600)
+#define EXYNOS5_CLKDIV_STATCPU1 EXYNOS_CLKREG(0x00604)
+
#define EXYNOS5_MPLL_CON0 EXYNOS_CLKREG(0x04100)
#define EXYNOS5_CLKSRC_CORE1 EXYNOS_CLKREG(0x04204)