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authorAndrew Jeffery <andrew@aj.id.au>2019-08-27 16:30:55 +0930
committerJoel Stanley <joel@jms.id.au>2019-11-01 15:29:48 +1030
commit311b57f051eac4dc56a4fa6295b14e48bac79487 (patch)
tree02a48c880f72b723ad553312ab9abfbfb2dcc694
parent54ecb8f7028c5eb3d740bb82b0f1d90f2df63c5c (diff)
ARM: dts: ast2600-evb: eMMC configuration
Enable the eMMC controller and limit it to 52MHz to avoid the host controller reporting bus error conditions. Reviewed-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
-rw-r--r--arch/arm/boot/dts/aspeed-ast2600-evb.dts8
-rw-r--r--arch/arm/boot/dts/aspeed-g6.dtsi4
2 files changed, 9 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/aspeed-ast2600-evb.dts b/arch/arm/boot/dts/aspeed-ast2600-evb.dts
index 9870553919b7..9443d3e34a61 100644
--- a/arch/arm/boot/dts/aspeed-ast2600-evb.dts
+++ b/arch/arm/boot/dts/aspeed-ast2600-evb.dts
@@ -71,10 +71,16 @@
phy-handle = <&ethphy3>;
};
-&emmc {
+&emmc_controller {
status = "okay";
};
+&emmc {
+ non-removable;
+ bus-width = <4>;
+ max-frequency = <52000000>;
+};
+
&rtc {
status = "okay";
};
diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi
index 3a1422f7c49c..7ca45b0ce3c3 100644
--- a/arch/arm/boot/dts/aspeed-g6.dtsi
+++ b/arch/arm/boot/dts/aspeed-g6.dtsi
@@ -235,7 +235,7 @@
};
};
- emmc: sdc@1e750000 {
+ emmc_controller: sdc@1e750000 {
compatible = "aspeed,ast2600-sd-controller";
reg = <0x1e750000 0x100>;
#address-cells = <1>;
@@ -244,7 +244,7 @@
clocks = <&syscon ASPEED_CLK_GATE_EMMCCLK>;
status = "disabled";
- sdhci@1e750100 {
+ emmc: sdhci@1e750100 {
compatible = "aspeed,ast2600-sdhci";
reg = <0x100 0x100>;
sdhci,auto-cmd12;