diff options
| author | Alex Deucher <alexander.deucher@amd.com> | 2013-02-05 11:58:11 -0500 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2013-06-26 16:11:43 -0400 |
| commit | 2f0047b2ba92b29bd419cafe2b0d2e91edb4e440 (patch) | |
| tree | c890b4eaa9ccad349c1428c9d90da169d397b54f | |
| parent | 0331f6749eeecc551abb893a17bbd99eb1cd0e18 (diff) | |
drm/radeon: Handle PPLL0 powerdown on DCE8
Only Bonaire has PPLL0.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| -rw-r--r-- | drivers/gpu/drm/radeon/atombios_crtc.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c index 590e4eb5f074..24eee7c76870 100644 --- a/drivers/gpu/drm/radeon/atombios_crtc.c +++ b/drivers/gpu/drm/radeon/atombios_crtc.c @@ -1931,7 +1931,7 @@ static void atombios_crtc_disable(struct drm_crtc *crtc) break; case ATOM_PPLL0: /* disable the ppll */ - if (ASIC_IS_DCE61(rdev)) + if ((rdev->family == CHIP_ARUBA) || (rdev->family == CHIP_BONAIRE)) atombios_crtc_program_pll(crtc, radeon_crtc->crtc_id, radeon_crtc->pll_id, 0, 0, ATOM_DISABLE, 0, 0, 0, 0, 0, false, &ss); break; |