diff options
author | Arun Kumar K <arun.kk@samsung.com> | 2014-04-28 15:50:44 +0530 |
---|---|---|
committer | Tomasz Figa <t.figa@samsung.com> | 2014-05-14 19:40:16 +0200 |
commit | 2ce262f456550f046da1175b968d754b0862b309 (patch) | |
tree | fc7bc3a59ec706ef557d584440057f45bc9c139c | |
parent | a5b219b40c463ff162368c7a1dc93387054c79f5 (diff) |
clk: samsung: exynos5420: Add clock IDs needed by GPU
Adds IDs for the clocks needed by the ARM Mali GPU
in exynos5420.
Signed-off-by: Arun Kumar K <arun.kk@samsung.com>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
-rw-r--r-- | drivers/clk/samsung/clk-exynos5420.c | 4 | ||||
-rw-r--r-- | include/dt-bindings/clock/exynos5420.h | 2 |
2 files changed, 4 insertions, 2 deletions
diff --git a/drivers/clk/samsung/clk-exynos5420.c b/drivers/clk/samsung/clk-exynos5420.c index 676a0bdabba0..15c884d0628f 100644 --- a/drivers/clk/samsung/clk-exynos5420.c +++ b/drivers/clk/samsung/clk-exynos5420.c @@ -363,7 +363,7 @@ static struct samsung_mux_clock exynos5420_mux_clks[] __initdata = { MUX(0, "mout_aclk66_psgen", aclk66_peric_p, SRC_TOP5, 4, 1), MUX(0, "mout_user_aclk333_g2d", user_aclk333_g2d_p, SRC_TOP5, 8, 1), MUX(0, "mout_user_aclk266_g2d", user_aclk266_g2d_p, SRC_TOP5, 12, 1), - MUX_A(0, "mout_user_aclk_g3d", user_aclk_g3d_p, + MUX_A(CLK_MOUT_G3D, "mout_user_aclk_g3d", user_aclk_g3d_p, SRC_TOP5, 16, 1, "aclkg3d"), MUX(0, "mout_user_aclk300_jpeg", user_aclk300_jpeg_p, SRC_TOP5, 20, 1), @@ -373,7 +373,7 @@ static struct samsung_mux_clock exynos5420_mux_clks[] __initdata = { SRC_TOP5, 28, 1), MUX(0, "sclk_mpll", mpll_p, SRC_TOP6, 0, 1), - MUX(0, "sclk_vpll", vpll_p, SRC_TOP6, 4, 1), + MUX(CLK_MOUT_VPLL, "sclk_vpll", vpll_p, SRC_TOP6, 4, 1), MUX(0, "sclk_spll", spll_p, SRC_TOP6, 8, 1), MUX(0, "sclk_ipll", ipll_p, SRC_TOP6, 12, 1), MUX(0, "sclk_rpll", rpll_p, SRC_TOP6, 16, 1), diff --git a/include/dt-bindings/clock/exynos5420.h b/include/dt-bindings/clock/exynos5420.h index 5eefd8813f02..54db8b34b1dc 100644 --- a/include/dt-bindings/clock/exynos5420.h +++ b/include/dt-bindings/clock/exynos5420.h @@ -178,6 +178,8 @@ /* mux clocks */ #define CLK_MOUT_HDMI 640 +#define CLK_MOUT_G3D 641 +#define CLK_MOUT_VPLL 642 /* divider clocks */ #define CLK_DOUT_PIXEL 768 |