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authorChen, Huacai <huacai.chen@intel.com>2008-06-10 09:05:08 +0800
committerRalf Baechle <ralf@linux-mips.org>2008-07-15 18:44:28 +0100
commit2954c02a884dc0ba9e91882c0aba13bcb9d22e6c (patch)
tree6323b16bbc5b7a78e02fe0b1624db3f2b0dd5ce2
parent4d3702b62e004172f44870763cf56793d8de0cbf (diff)
[MIPS] modify the MIPS CPU classfication
Signed-off-by: Huacai Chen <huacai.chen@intel.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r--include/asm-mips/cpu.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/include/asm-mips/cpu.h b/include/asm-mips/cpu.h
index 1c35cac6f35b..229a786101d9 100644
--- a/include/asm-mips/cpu.h
+++ b/include/asm-mips/cpu.h
@@ -66,8 +66,10 @@
#define PRID_IMP_RM7000 0x2700
#define PRID_IMP_NEVADA 0x2800 /* RM5260 ??? */
#define PRID_IMP_RM9000 0x3400
+#define PRID_IMP_LOONGSON1 0x4200
#define PRID_IMP_R5432 0x5400
#define PRID_IMP_R5500 0x5500
+#define PRID_IMP_LOONGSON2 0x6300
#define PRID_IMP_UNKNOWN 0xff00
@@ -90,8 +92,6 @@
#define PRID_IMP_24KE 0x9600
#define PRID_IMP_74K 0x9700
#define PRID_IMP_1004K 0x9900
-#define PRID_IMP_LOONGSON1 0x4200
-#define PRID_IMP_LOONGSON2 0x6300
/*
* These are the PRID's for when 23:16 == PRID_COMP_SIBYTE