diff options
| author | Anusha Srivatsa <anusha.srivatsa@intel.com> | 2021-05-21 10:40:47 -0700 |
|---|---|---|
| committer | Jani Nikula <jani.nikula@intel.com> | 2021-05-24 12:04:35 +0300 |
| commit | 273895109a04521eb6f2e3ab872d7d95a54c2c6b (patch) | |
| tree | 9115a6914efe3d884049890513bb9b51024376b6 | |
| parent | cb4920cc40f630b5a247f4ed7d3dea66749df588 (diff) | |
drm/i915/gvt: Add missing macro name changes
Propogate changes to macros name containing CSR_*
to DMC_* from display side.
Fixes: 0633cdcbaa77 ("drm/i915/dmc: Rename macro names containing csr")
Cc: intel-gvt-dev@lists.freedesktop.org
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210521174047.3861-1-anusha.srivatsa@intel.com
| -rw-r--r-- | drivers/gpu/drm/i915/gvt/handlers.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c index dda320749c65..33496397a74f 100644 --- a/drivers/gpu/drm/i915/gvt/handlers.c +++ b/drivers/gpu/drm/i915/gvt/handlers.c @@ -3342,9 +3342,9 @@ static int init_skl_mmio_info(struct intel_gvt *gvt) MMIO_D(_MMIO(_PLANE_SURF_3_A), D_SKL_PLUS); MMIO_D(_MMIO(_PLANE_SURF_3_B), D_SKL_PLUS); - MMIO_D(CSR_SSP_BASE, D_SKL_PLUS); - MMIO_D(CSR_HTP_SKL, D_SKL_PLUS); - MMIO_D(CSR_LAST_WRITE, D_SKL_PLUS); + MMIO_D(DMC_SSP_BASE, D_SKL_PLUS); + MMIO_D(DMC_HTP_SKL, D_SKL_PLUS); + MMIO_D(DMC_LAST_WRITE, D_SKL_PLUS); MMIO_DFH(BDW_SCRATCH1, D_SKL_PLUS, F_CMD_ACCESS, NULL, NULL); @@ -3655,7 +3655,7 @@ void intel_gvt_clean_mmio_info(struct intel_gvt *gvt) * otherwise, need to update cmd_reg_handler in cmd_parser.c */ static struct gvt_mmio_block mmio_blocks[] = { - {D_SKL_PLUS, _MMIO(CSR_MMIO_START_RANGE), 0x3000, NULL, NULL}, + {D_SKL_PLUS, _MMIO(DMC_MMIO_START_RANGE), 0x3000, NULL, NULL}, {D_ALL, _MMIO(MCHBAR_MIRROR_BASE_SNB), 0x40000, NULL, NULL}, {D_ALL, _MMIO(VGT_PVINFO_PAGE), VGT_PVINFO_SIZE, pvinfo_mmio_read, pvinfo_mmio_write}, |