diff options
author | Alexander Duyck <alexander.h.duyck@intel.com> | 2009-05-07 10:39:16 +0000 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2009-05-07 14:52:30 -0700 |
commit | 163de42e240623694562656542adedbca369beaf (patch) | |
tree | 8ce1060e0f506c3bb60061fc90772520c6c8eb2e | |
parent | afafd5b020a60b72d064e89244cb44a975eb2407 (diff) |
ixgbe: set queue0 for srrctl configuration correctly for DCB
The current configuration is not setting queue 0 correctly for DCB
configurations. As a result unconfigured queues are being used to setup
the SRRCTL register rx buffer len sizes.
Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r-- | drivers/net/ixgbe/ixgbe_main.c | 13 |
1 files changed, 12 insertions, 1 deletions
diff --git a/drivers/net/ixgbe/ixgbe_main.c b/drivers/net/ixgbe/ixgbe_main.c index 4c38d51397ce..d64a2d7d5fa5 100644 --- a/drivers/net/ixgbe/ixgbe_main.c +++ b/drivers/net/ixgbe/ixgbe_main.c @@ -1740,7 +1740,18 @@ static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter, int index) unsigned long mask; if (adapter->hw.mac.type == ixgbe_mac_82599EB) { - queue0 = index; + if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) { + int dcb_i = adapter->ring_feature[RING_F_DCB].indices; + if (dcb_i == 8) + queue0 = index >> 4; + else if (dcb_i == 4) + queue0 = index >> 5; + else + dev_err(&adapter->pdev->dev, "Invalid DCB " + "configuration\n"); + } else { + queue0 = index; + } } else { mask = (unsigned long) adapter->ring_feature[RING_F_RSS].mask; queue0 = index & mask; |