diff options
| author | Alex Deucher <alexander.deucher@amd.com> | 2019-10-17 11:57:45 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2019-10-25 16:48:14 -0400 |
| commit | 0e04ad7d1857670944786a8465930a049aaf995f (patch) | |
| tree | a939bbb0ea5e6aa6f5a7471cedaa06b897a34804 | |
| parent | ee8bcc2333cc9e24e260e590131fa21c003e41ba (diff) | |
drm/amdgpu/powerplay: use local renoir array sizes for clock fetching
To avoid walking past the end of the arrays since the PP_SMU
defines don't match the renoir defines.
Reviewed-by: Prike Liang <Prike.Liang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| -rw-r--r-- | drivers/gpu/drm/amd/powerplay/renoir_ppt.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/renoir_ppt.c b/drivers/gpu/drm/amd/powerplay/renoir_ppt.c index 953e347633ec..57930c9e22ff 100644 --- a/drivers/gpu/drm/amd/powerplay/renoir_ppt.c +++ b/drivers/gpu/drm/amd/powerplay/renoir_ppt.c @@ -427,22 +427,22 @@ static int renoir_get_dpm_clock_table(struct smu_context *smu, struct dpm_clocks if (!clock_table || !table) return -EINVAL; - for (i = 0; i < PP_SMU_NUM_DCFCLK_DPM_LEVELS; i++) { + for (i = 0; i < NUM_DCFCLK_DPM_LEVELS; i++) { clock_table->DcfClocks[i].Freq = table->DcfClocks[i].Freq; clock_table->DcfClocks[i].Vol = table->DcfClocks[i].Vol; } - for (i = 0; i < PP_SMU_NUM_SOCCLK_DPM_LEVELS; i++) { + for (i = 0; i < NUM_SOCCLK_DPM_LEVELS; i++) { clock_table->SocClocks[i].Freq = table->SocClocks[i].Freq; clock_table->SocClocks[i].Vol = table->SocClocks[i].Vol; } - for (i = 0; i < PP_SMU_NUM_FCLK_DPM_LEVELS; i++) { + for (i = 0; i < NUM_FCLK_DPM_LEVELS; i++) { clock_table->FClocks[i].Freq = table->FClocks[i].Freq; clock_table->FClocks[i].Vol = table->FClocks[i].Vol; } - for (i = 0; i< PP_SMU_NUM_MEMCLK_DPM_LEVELS; i++) { + for (i = 0; i< NUM_MEMCLK_DPM_LEVELS; i++) { clock_table->MemClocks[i].Freq = table->MemClocks[i].Freq; clock_table->MemClocks[i].Vol = table->MemClocks[i].Vol; } |