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authorLikun Gao <Likun.Gao@amd.com>2020-05-18 18:19:30 +0800
committerAlex Deucher <alexander.deucher@amd.com>2020-05-21 12:48:42 -0400
commit0bcfa78c262a5195f0ba6f89c116e03c20e9c1bc (patch)
treee8e7601d4438d71d63468db8a2e17275542e760c
parent997769fa806b62cbc1eff4b777aee088b5997508 (diff)
drm/amdgpu: add condition to set MP1 state on gpu reset
Only ras supportted need to set MP1 state to prepare for unload before reloading SMU FW. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index ddb4af0cc702..7301fdcfb8bc 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
@@ -1552,12 +1552,13 @@ static int psp_load_smu_fw(struct psp_context *psp)
struct amdgpu_device* adev = psp->adev;
struct amdgpu_firmware_info *ucode =
&adev->firmware.ucode[AMDGPU_UCODE_ID_SMC];
+ struct amdgpu_ras *ras = psp->ras.ras;
if (!ucode->fw || amdgpu_sriov_vf(psp->adev))
return 0;
- if (adev->in_gpu_reset) {
+ if (adev->in_gpu_reset && ras && ras->supported) {
ret = amdgpu_dpm_set_mp1_state(adev, PP_MP1_STATE_UNLOAD);
if (ret) {
DRM_WARN("Failed to set MP1 state prepare for reload\n");