diff options
| author | Barry Song <barry.song@analog.com> | 2010-08-05 11:07:44 -0400 |
|---|---|---|
| committer | David Woodhouse <David.Woodhouse@intel.com> | 2010-08-05 16:14:04 +0100 |
| commit | 085d45fb5216c25b69103e5d861fabdc4389e221 (patch) | |
| tree | ddddd005d86f5e4e084b3d0f01e4a9a12fc23645 | |
| parent | 7ee064c90b3a65aa0c8d8cd87681177645db494e (diff) | |
mtd: Blackfin NFC: fix raw page write/read handling
Our write_buf/read_buf funcs always do ECC in HW ECC mode. That is not
needed for raw funcs. In fact, write_buf/read_buf should be a pure func
for data input/output while chip->ecc.hwctl controls ECC. Unfortunately,
we can't separate ECC from normal data input/output in our NFC, so our DMA
write_buf/read_buf entries are coupled with ECC operations closely.
Thus we need to provide dedicated read_page_raw/write_page_raw funcs where
we do non-DMA transactions so as to avoid automatic ECC.
Signed-off-by: Barry Song <barry.song@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| -rw-r--r-- | drivers/mtd/nand/bf5xx_nand.c | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/drivers/mtd/nand/bf5xx_nand.c b/drivers/mtd/nand/bf5xx_nand.c index 524cf5f41523..ca39819982bf 100644 --- a/drivers/mtd/nand/bf5xx_nand.c +++ b/drivers/mtd/nand/bf5xx_nand.c @@ -571,6 +571,22 @@ static void bf5xx_nand_dma_write_buf(struct mtd_info *mtd, bf5xx_nand_write_buf(mtd, buf, len); } +static int bf5xx_nand_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip, + uint8_t *buf, int page) +{ + bf5xx_nand_read_buf(mtd, buf, mtd->writesize); + bf5xx_nand_read_buf(mtd, chip->oob_poi, mtd->oobsize); + + return 0; +} + +static void bf5xx_nand_write_page_raw(struct mtd_info *mtd, struct nand_chip *chip, + const uint8_t *buf) +{ + bf5xx_nand_write_buf(mtd, buf, mtd->writesize); + bf5xx_nand_write_buf(mtd, chip->oob_poi, mtd->oobsize); +} + /* * System initialization functions */ @@ -795,6 +811,8 @@ static int __devinit bf5xx_nand_probe(struct platform_device *pdev) chip->ecc.correct = bf5xx_nand_correct_data; chip->ecc.mode = NAND_ECC_HW; chip->ecc.hwctl = bf5xx_nand_enable_hwecc; + chip->ecc.read_page_raw = bf5xx_nand_read_page_raw; + chip->ecc.write_page_raw = bf5xx_nand_write_page_raw; } else { chip->ecc.mode = NAND_ECC_SOFT; } |