staging: rtl8192su: r8192U.h, clean header

Signed-off-by: Florian Schilhabel <florian.c.schilhabel@googlemail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>

1 files changed, 17 insertions, 152 deletions

diff --git a/drivers/staging/rtl8192su/r8192U.h b/drivers/staging/rtl8192su/r8192U.h
index b87d1b4afda3..ddf3cf107dbb 100644
--- a/drivers/staging/rtl8192su/r8192U.h
+++ b/drivers/staging/rtl8192su/r8192U.h
@@ -20,14 +20,12 @@
 
 #include <linux/module.h>
 #include <linux/kernel.h>
-//#include <linux/config.h>
 #include <linux/init.h>
 #include <linux/ioport.h>
 #include <linux/sched.h>
 #include <linux/types.h>
 #include <linux/slab.h>
 #include <linux/netdevice.h>
-//#include <linux/pci.h>
 #include <linux/usb.h>
 #include <linux/etherdevice.h>
 #include <linux/delay.h>
@@ -51,9 +49,7 @@
 #define RTL819X_EEPROM_CMD_CK		(1 << 2)
 #define RTL819X_EEPROM_CMD_CS		(1 << 3)
 
-//#define RTL8192U
 #define RTL819xU_MODULE_NAME "rtl819xU"
-//added for HW security, john.0629
 #define FALSE 0
 #define TRUE 1
 #define MAX_KEY_LEN     61
@@ -137,10 +133,8 @@ do { if(rt_global_debug_component & component) \
 #define COMP_SEC			        BIT20	// Event handling
 #define COMP_LED				BIT21	// For LED.
 #define COMP_RF					BIT22	// For RF.
-//1!!!!!!!!!!!!!!!!!!!!!!!!!!!
+
 #define COMP_RXDESC				BIT23	// Show Rx desc information for SD3 debug. Added by Annie, 2006-07-15.
-//1//1Attention Please!!!<11n or 8190 specific code should be put below this line>
-//1!!!!!!!!!!!!!!!!!!!!!!!!!!!
 
 #define COMP_FIRMWARE				BIT24	//for firmware downloading
 #define COMP_HT					BIT25	// For 802.11n HT related information. by Emily 2006-8-11
@@ -159,8 +153,7 @@ do { if(rt_global_debug_component & component) \
                 printk( "Assertion failed! %s,%s,%s,line=%d\n", \
                 #expr,__FILE__,__FUNCTION__,__LINE__);          \
         }
-//wb added to debug out data buf
-//if you want print DATA buffer related BA, please set ieee80211_debug_level to DATA|BA
+
 #define RT_DEBUG_DATA(level, data, datalen)      \
         do{ if ((rt_global_debug_component & (level)) == (level))   \
                 {       \
@@ -180,25 +173,17 @@ do { if(rt_global_debug_component & component) \
 #define RT_DEBUG_DATA(level, data, datalen) do {} while(0)
 #endif /* RTL8169_DEBUG */
 
-//#ifdef RTL8192SU
 	//2TODO: We should define 8192S firmware related macro settings here!!
 	#define RTL819X_DEFAULT_RF_TYPE				RF_1T2R
 	#define RTL819X_TOTAL_RF_PATH				2
 
-	//#define Rtl819XFwBootArray					Rtl8192UsbFwBootArray
-	//#define Rtl819XFwMainArray					Rtl8192UsbFwMainArray
-	//#define Rtl819XFwDataArray					Rtl8192UsbFwDataArray
-
 	#define Rtl819XMACPHY_Array_PG				Rtl8192UsbMACPHY_Array_PG
 	#define Rtl819XMACPHY_Array					Rtl8192UsbMACPHY_Array
 	#define Rtl819XPHY_REGArray					Rtl8192UsbPHY_REGArray
 	#define Rtl819XPHY_REG_1T2RArray				Rtl8192UsbPHY_REG_1T2RArray
-	//#define Rtl819XRadioA_Array					Rtl8192UsbRadioA_Array
-	//#define Rtl819XRadioB_Array					Rtl8192UsbRadioB_Array
 	#define Rtl819XRadioC_Array					Rtl8192UsbRadioC_Array
 	#define Rtl819XRadioD_Array					Rtl8192UsbRadioD_Array
 
-	//2008.11.06 Add.
 	#define Rtl819XFwImageArray					Rtl8192SUFwImgArray
 	#define Rtl819XMAC_Array						Rtl8192SUMAC_2T_Array
 	#define Rtl819XAGCTAB_Array					Rtl8192SUAGCTAB_Array
@@ -212,8 +197,6 @@ do { if(rt_global_debug_component & component) \
 	#define Rtl819XRadioB_GM_Array				Rtl8192SURadioB_GM_Array
 	#define Rtl819XRadioA_to1T_Array				Rtl8192SURadioA_to1T_Array
 	#define Rtl819XRadioA_to2T_Array				Rtl8192SURadioA_to2T_Array
-//#endif
-
 //
 // Queue Select Value in TxDesc
 //
@@ -256,7 +239,6 @@ do { if(rt_global_debug_component & component) \
 #define DESC90_RATEMCS15                        0x0f
 #define DESC90_RATEMCS32                        0x20
 
-//#ifdef RTL8192SU
 // CCK Rates, TxHT = 0
 #define DESC92S_RATE1M					0x00
 #define DESC92S_RATE2M					0x01
@@ -292,13 +274,12 @@ do { if(rt_global_debug_component & component) \
 #define DESC92S_RATEMCS15				0x1b
 #define DESC92S_RATEMCS15_SG			0x1c
 #define DESC92S_RATEMCS32				0x20
-//#endif
 
 #define RTL819X_DEFAULT_RF_TYPE RF_1T2R
 
 #define IEEE80211_WATCH_DOG_TIME    2000
 #define		PHY_Beacon_RSSI_SLID_WIN_MAX		10
-//for txpowertracking by amy
+//for txpowertracking
 #define 	OFDM_Table_Length	19
 #define	CCK_Table_length	12
 
@@ -522,7 +503,6 @@ typedef struct rtl8192_rx_info {
 	u8 out_pipe;
 }rtl8192_rx_info ;
 
-//typedef struct _RX_DESC_STATUS_8192SU{
 typedef struct rx_desc_819x_usb{
 	//DWORD 0
 	u16		Length:14;
@@ -582,14 +562,12 @@ typedef struct rx_desc_819x_usb{
 
 	//DWORD 5
 	u32		TSFL;
-//}RX_DESC_STATUS_8192SU, *PRX_DESC_STATUS_8192SU;
 }rx_desc_819x_usb, *prx_desc_819x_usb;
 
 
 //
 // Driver info are written to the begining of the RxBuffer
 //
-//typedef struct _RX_DRIVER_INFO_8192S{
 typedef struct rx_drvinfo_819x_usb{
 	//
 	// Driver info contain PHY status and other variabel size info
@@ -597,62 +575,27 @@ typedef struct rx_drvinfo_819x_usb{
 	//
 
 	//DWORD 0
-	/*u4Byte			gain_0:7;
-	u4Byte			trsw_0:1;
-	u4Byte			gain_1:7;
-	u4Byte			trsw_1:1;
-	u4Byte			gain_2:7;
-	u4Byte			trsw_2:1;
-	u4Byte			gain_3:7;
-	u4Byte			trsw_3:1;	*/
 	u8			gain_trsw[4];
 
 	//DWORD 1
-	/*u4Byte			pwdb_all:8;
-	u4Byte			cfosho_0:8;
-	u4Byte			cfosho_1:8;
-	u4Byte			cfosho_2:8;*/
 	u8			pwdb_all;
 	u8			cfosho[4];
 
 	//DWORD 2
-	/*u4Byte			cfosho_3:8;
-	u4Byte			cfotail_0:8;
-	u4Byte			cfotail_1:8;
-	u4Byte			cfotail_2:8;*/
 	u8			cfotail[4];
 
 	//DWORD 3
-	/*u4Byte			cfotail_3:8;
-	u4Byte			rxevm_0:8;
-	u4Byte			rxevm_1:8;
-	u4Byte			rxsnr_0:8;*/
 	char			        rxevm[2];
 	char			        rxsnr[4];
 
 	//DWORD 4
-	/*u4Byte			rxsnr_1:8;
-	u4Byte			rxsnr_2:8;
-	u4Byte			rxsnr_3:8;
-	u4Byte			pdsnr_0:8;*/
 	u8			pdsnr[2];
 
 	//DWORD 5
-	/*u4Byte			pdsnr_1:8;
-	u4Byte			csi_current_0:8;
-	u4Byte			csi_current_1:8;
-	u4Byte			csi_target_0:8;*/
 	u8			csi_current[2];
 	u8			csi_target[2];
 
 	//DWORD 6
-	/*u4Byte			csi_target_1:8;
-	u4Byte			sigevm:8;
-	u4Byte			max_ex_pwr:8;
-	u4Byte			ex_intf_flag:1;
-	u4Byte			sgi_en:1;
-	u4Byte			rxsc:2;
-	u4Byte			reserve:4;*/
 	u8			sigevm;
 	u8			max_ex_pwr;
 	u8			ex_intf_flag:1;
@@ -669,10 +612,8 @@ typedef struct rx_drvinfo_819x_usb{
 
 #define MAX_DEV_ADDR_SIZE		8  /* support till 64 bit bus width OS */
 #define MAX_FIRMWARE_INFORMATION_SIZE   32 /*2006/04/30 by Emily forRTL8190*/
-//#define MAX_802_11_HEADER_LENGTH        (40 + MAX_FIRMWARE_INFORMATION_SIZE)
 #define ENCRYPTION_MAX_OVERHEAD		128
 #define	USB_HWDESC_HEADER_LEN		sizeof(tx_desc_819x_usb)
-//#define TX_PACKET_SHIFT_BYTES 	  	(USB_HWDESC_HEADER_LEN + sizeof(tx_fwinfo_819x_usb))
 #define MAX_FRAGMENT_COUNT		8
 #ifdef RTL8192U
 #define MAX_TRANSMIT_BUFFER_SIZE			8000
@@ -780,10 +721,6 @@ typedef struct rtl_reg_debug{
 typedef struct _rt_9x_tx_rate_history {
 	u32             cck[4];
 	u32             ofdm[8];
-	// HT_MCS[0][]: BW=0 SG=0
-	// HT_MCS[1][]: BW=1 SG=0
-	// HT_MCS[2][]: BW=0 SG=1
-	// HT_MCS[3][]: BW=1 SG=1
 	u32             ht_mcs[4][16];
 }rt_tx_rahis_t, *prt_tx_rahis_t;
 typedef struct _RT_SMOOTH_DATA_4RF {
@@ -798,11 +735,6 @@ typedef struct _RT_SMOOTH_DATA_4RF {
 typedef struct Stats
 {
 	unsigned long txrdu;
-//	unsigned long rxrdu;
-	//unsigned long rxnolast;
-	//unsigned long rxnodata;
-//	unsigned long rxreset;
-//	unsigned long rxnopointer;
 	unsigned long rxok;
 	unsigned long rxframgment;
 	unsigned long rxcmdpkt[4];		//08/05/08 amy rx cmd element txfeedback/bcn report/cfg set/query
@@ -822,18 +754,8 @@ typedef struct Stats
 	unsigned long txnperr;
 	unsigned long txnpdrop;
 	unsigned long txresumed;
-//	unsigned long rxerr;
-//	unsigned long rxoverflow;
-//	unsigned long rxint;
 	unsigned long txnpokint;
-//	unsigned long txhpokint;
-//	unsigned long txhperr;
-//	unsigned long ints;
-//	unsigned long shints;
 	unsigned long txoverflow;
-//	unsigned long rxdmafail;
-//	unsigned long txbeacon;
-//	unsigned long txbeaconerr;
 	unsigned long txlpokint;
 	unsigned long txlpdrop;
 	unsigned long txlperr;
@@ -899,14 +821,11 @@ typedef struct Stats
 	u32	CurrentShowTxate;
 } Stats;
 
-
 // Bandwidth Offset
 #define HAL_PRIME_CHNL_OFFSET_DONT_CARE		0
 #define HAL_PRIME_CHNL_OFFSET_LOWER			1
 #define HAL_PRIME_CHNL_OFFSET_UPPER			2
 
-//+by amy 080507
-
 typedef struct 	ChnlAccessSetting {
 	u16 SIFS_Timer;
 	u16 DIFS_Timer;
@@ -946,14 +865,12 @@ typedef enum _RT_RF_TYPE_819xU{
         RF_PSEUDO_11N = 5,
 }RT_RF_TYPE_819xU, *PRT_RF_TYPE_819xU;
 
-//#ifdef RTL8192SU
 typedef enum _RF_POWER_STATE{
 	RF_ON,
 	RF_SLEEP,
 	RF_OFF,
 	RF_SHUT_DOWN,
 }RF_POWER_STATE, *PRF_POWER_STATE;
-//#endif
 
 typedef struct _rate_adaptive
 {
@@ -1004,7 +921,6 @@ typedef struct _init_gain
 	u8				cca;
 
 } init_gain, *pinit_gain;
-//by amy 0606
 
 typedef struct _phy_ofdm_rx_status_report_819xusb
 {
@@ -1083,8 +999,6 @@ typedef enum{
 	NIC_8192SU = 5,
 	} nic_t;
 
-//definded by WB. Ready to fill handlers for different NIC types.
-//add handle here when necessary.
 struct rtl819x_ops{
 	nic_t nic_type;
 	void (* rtl819x_read_eeprom_info)(struct net_device *dev);
@@ -1121,55 +1035,31 @@ typedef struct r8192_priv
 
 	short card_8192; /* O: rtl8192, 1:rtl8185 V B/C, 2:rtl8185 V D */
 	u8 card_8192_version; /* if TCR reports card V B/C this discriminates */
-//	short phy_ver; /* meaningful for rtl8225 1:A 2:B 3:C */
 	short enable_gpio0;
 	enum card_type {PCI,MINIPCI,CARDBUS,USB}card_type;
 	short hw_plcp_len;
 	short plcp_preamble_mode;
 
 	spinlock_t irq_lock;
-//	spinlock_t irq_th_lock;
 	spinlock_t tx_lock;
 	spinlock_t ps_lock;
         struct mutex mutex;
 	spinlock_t rf_lock; //used to lock rf write operation added by wb
 
 	u16 irq_mask;
-//	short irq_enabled;
-//	struct net_device *dev; //comment this out.
 	short chan;
 	short sens;
 	short max_sens;
 
-
-	//	u8 chtxpwr[15]; //channels from 1 to 14, 0 not used
-//	u8 chtxpwr_ofdm[15]; //channels from 1 to 14, 0 not used
-//	u8 cck_txpwr_base;
-//	u8 ofdm_txpwr_base;
-//	u8 challow[15]; //channels from 1 to 14, 0 not used
 	short up;
 	short crcmon; //if 1 allow bad crc frame reception in monitor mode
-//	short prism_hdr;
-
-//	struct timer_list scan_timer;
-	/*short scanpending;
-	short stopscan;*/
-//	spinlock_t scan_lock;
-//	u8 active_probe;
-	//u8 active_scan_num;
+
 	struct semaphore wx_sem;
 	struct semaphore rf_sem; //used to lock rf write operation added by wb, modified by david
-//	short hw_wep;
 
-//	short digphy;
-//	short antb;
-//	short diversity;
-//	u8 cs_treshold;
-//	short rcr_csense;
 	u8 rf_type; //0 means 1T2R, 1 means 2T4R
 	RT_RF_TYPE_819xU rf_chip;
 
-//	u32 key0[4];
 	short (*rf_set_sens)(struct net_device *dev,short sens);
 	u8 (*rf_set_chan)(struct net_device *dev,u8 ch);
 	void (*rf_close)(struct net_device *dev);
@@ -1182,13 +1072,10 @@ typedef struct r8192_priv
 	struct proc_dir_entry *dir_dev;
 
 	/*RX stuff*/
-//	u32 *rxring;
-//	u32 *rxringtail;
-//	dma_addr_t rxringdma;
 	struct urb **rx_urb;
 	struct urb **rx_cmd_urb;
 
-/* modified by davad for Rx process */
+/* for Rx process */
        struct sk_buff_head rx_queue;
        struct sk_buff_head skb_queue;
 
@@ -1248,7 +1135,6 @@ typedef struct r8192_priv
 	u8 EEPROMTxPowerLevelOFDM24G[3]; // OFDM 2.4G channel 1~14
 	u8 EEPROMTxPowerLevelOFDM5G[24];	// OFDM 5G
 
-//RTL8192SU
 	bool	bDmDisableProtect;
 	bool	bIgnoreDiffRateTxPowerOffset;
 
@@ -1291,7 +1177,7 @@ typedef struct r8192_priv
 	u8	RfTxPwrLevelCck[2][14];
 	u8	RfTxPwrLevelOfdm1T[2][14];
 	u8	RfTxPwrLevelOfdm2T[2][14];
-	// 2009/01/20 MH Add for new EEPROM format.
+	// new EEPROM format.
 	u8					TxPwrHt20Diff[2][14];				// HT 20<->40 Pwr diff
 	u8					TxPwrLegacyHtDiff[2][14];		// For HT<->legacy pwr diff
 	u8					TxPwrbandEdgeHt40[2][2];		// Band edge for HY 40MHZlow/up channel
@@ -1303,7 +1189,6 @@ typedef struct r8192_priv
 	u8 				MidHighPwrTHR_L1;
 	u8 				MidHighPwrTHR_L2;
 	u8				TxPwrSafetyFlag;				// for Tx power safety spec
-//RTL8192SU
 
 /*PHY related*/
 	BB_REGISTER_DEFINITION_T	PHYRegDef[4];	//Radio A/B/C/D
@@ -1335,19 +1220,15 @@ typedef struct r8192_priv
 	// 8190 40MHz mode
 	//
 	u8	nCur40MhzPrimeSC;	// Control channel sub-carrier
-	// Joseph test for shorten RF configuration time.
-	// We save RF reg0 in this variable to reduce RF reading.
-	//
+
 	u32					RfReg0Value[4];
 	u8 					NumTotalRFPath;
 	bool 				brfpath_rxenable[4];
 	//RF set related
 	bool				SetRFPowerStateInProgress;
-//+by amy 080507
+
 	struct timer_list watch_dog_timer;
 
-//+by amy 080515 for dynamic mechenism
-	//Add by amy Tx Power Control for Near/Far Range 2008/05/15
 	bool	bdynamic_txpower;  //bDynamicTxPower
 	bool	bDynamicTxHighPower;  // Tx high power state
 	bool	bDynamicTxLowPower;  // Tx low power state
@@ -1356,17 +1237,16 @@ typedef struct r8192_priv
 
 	bool	bstore_last_dtpflag;
 	bool	bstart_txctrl_bydtp;   //Define to discriminate on High power State or on sitesuvey to change Tx gain index
-	//Add by amy for Rate Adaptive
+
 	rate_adaptive rate_adaptive;
-	//Add by amy for TX power tracking
-	//2008/05/15  Mars OPEN/CLOSE TX POWER TRACKING
+	// TX power tracking
        txbbgain_struct txbbgain_table[TxBBGainTableLength];
        u8	EEPROMTxPowerTrackEnable;
 	u8			   txpower_count;//For 6 sec do tracking again
 	bool			   btxpower_trackingInit;
 	u8			   OFDM_index;
 	u8			   CCK_index;
-	//2007/09/10 Mars Add CCK TX Power Tracking
+	// CCK TX Power Tracking
 	ccktxbbgain_struct	cck_txbbgain_table[CCKTxBBGainTableLength];
 	ccktxbbgain_struct	cck_txbbgain_ch14_table[CCKTxBBGainTableLength];
 	u8 rfa_txpowertrackingindex;
@@ -1386,7 +1266,7 @@ typedef struct r8192_priv
 	//For Backup Initial Gain
 	init_gain initgain_backup;
 	u8 DefaultInitialGain[4];
-	// For EDCA Turbo mode, Added by amy 080515.
+	// For EDCA Turbo mode
 	bool		bis_any_nonbepkts;
 	bool		bcurrent_turbo_EDCA;
 	bool		bis_cur_rdlstate;
@@ -1400,17 +1280,16 @@ typedef struct r8192_priv
 	u8	framesync;
 	u32 	framesyncC34;
 	u8   	framesyncMonitor;
-        	//Added by amy 080516  for RX related
+        	// RX related
 	u16 	nrxAMPDU_size;
 	u8 	nrxAMPDU_aggr_num;
 
-	//by amy for gpio
+	// gpio
 	 bool bHwRadioOff;
 
-	//by amy for reset_count
 	u32 reset_count;
 	bool bpbc_pressed;
-	//by amy for debug
+	// debug
 	u32 txpower_checkcnt;
 	u32 txpower_tracking_callback_cnt;
 	u8 thermal_read_val[40];
@@ -1419,7 +1298,7 @@ typedef struct r8192_priv
 	u32 ccktxpower_adjustcnt_ch14;
 	u8 tx_fwinfo_force_subcarriermode;
 	u8 tx_fwinfo_force_subcarrierval;
-	//by amy for silent reset
+	// silent reset
 	RESET_TYPE	ResetProgress;
 	bool		bForcedSilentReset;
 	bool		bDisableNormalResetCheck;
@@ -1432,7 +1311,6 @@ typedef struct r8192_priv
 
 	u16		SifsTime;
 
-	//define work item by amy 080526
 	struct delayed_work update_beacon_wq;
 	struct delayed_work watch_dog_wq;
 	struct delayed_work txpower_tracking_wq;
@@ -1441,8 +1319,7 @@ typedef struct r8192_priv
 	struct delayed_work initialgain_operate_wq;
 
 	struct workqueue_struct *priv_wq;
-//#ifdef RTL8192SU
-	//lzm add for 8192S
+
 	 u32 			IntrMask;
 	// RF and BB access related synchronization flags.
 	bool				bChangeBBInProgress; // BaseBand RW is still in progress.
@@ -1457,7 +1334,6 @@ typedef struct r8192_priv
 	u8				ThermalReadBackIndex;			//debug only
 	u8				ThermalReadVal[40];				//debug only
 
-	// For HCT test, 2005.07.15, by rcnjko.
 	// not realize true, just define it, set it 0 default, because some func use it
 	bool				bInHctTest;
 
@@ -1474,7 +1350,6 @@ typedef struct r8192_priv
 	char					RF_C_TxPwDiff;					// Antenna gain offset, rf-c to rf-a
 
 	bool	bRFSiOrPi;//0=si, 1=pi.
-	//lzm add for 8192S
 
 	bool SetFwCmdInProgress; //is set FW CMD in Progress? 92S only
 	u8 CurrentFwCmdIO;
@@ -1499,14 +1374,6 @@ typedef struct r8192_priv
 
 }r8192_priv;
 
-// for rtl8187
-// now mirging to rtl8187B
-/*
-typedef enum{
-	LOW_PRIORITY = 0x02,
-	NORM_PRIORITY
-	} priority_t;
-*/
 //for rtl8187B
 typedef enum{
 	BULK_PRIORITY = 0x01,
@@ -1560,7 +1427,6 @@ void rtl8192_rx_enable(struct net_device *);
 void rtl8192_tx_enable(struct net_device *);
 
 void rtl8192_disassociate(struct net_device *dev);
-//void fix_rx_fifo(struct net_device *dev);
 void rtl8185_set_rf_pins_enable(struct net_device *dev,u32 a);
 
 void rtl8192_set_anaparam(struct net_device *dev,u32 a);
@@ -1575,7 +1441,6 @@ void write_phy_cck(struct net_device *dev, u8 adr, u32 data);
 void write_phy_ofdm(struct net_device *dev, u8 adr, u32 data);
 void rtl8185_tx_antenna(struct net_device *dev, u8 ant);
 void rtl8192_set_rxconf(struct net_device *dev);
-//short check_nic_enough_desc(struct net_device *dev, priority_t priority);
 extern void rtl819xusb_beacon_tx(struct net_device *dev,u16  tx_rate);
 void CamResetAllEntry(struct net_device* dev);
 void EnableHWSecurityConfig8192(struct net_device *dev);