diff options
| author | Alexander Stein <alexander.stein@systec-electronic.com> | 2015-07-02 11:37:56 +0200 |
|---|---|---|
| committer | Brian Norris <computersforpeace@gmail.com> | 2015-07-20 10:41:33 -0700 |
| commit | 038761dfe4ce145f0f080cc08ee43f6e0ab3ae2f (patch) | |
| tree | b634b9ce0d3a0afe060772170b98925016d74b13 | |
| parent | cef1ed9c6bcf69245c0b9eb89b3f3a45049ba10c (diff) | |
mtd: fsl-quadspi: Actually clear TX FIFO upon write
QUADSPI_MCR_CLR_TXF_MASK is the correct mask for clearing the TX FIFO.
Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| -rw-r--r-- | drivers/mtd/spi-nor/fsl-quadspi.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/mtd/spi-nor/fsl-quadspi.c b/drivers/mtd/spi-nor/fsl-quadspi.c index 4fe13dd535f8..1946c6da76cd 100644 --- a/drivers/mtd/spi-nor/fsl-quadspi.c +++ b/drivers/mtd/spi-nor/fsl-quadspi.c @@ -539,7 +539,7 @@ static int fsl_qspi_nor_write(struct fsl_qspi *q, struct spi_nor *nor, /* clear the TX FIFO. */ tmp = readl(q->iobase + QUADSPI_MCR); - writel(tmp | QUADSPI_MCR_CLR_RXF_MASK, q->iobase + QUADSPI_MCR); + writel(tmp | QUADSPI_MCR_CLR_TXF_MASK, q->iobase + QUADSPI_MCR); /* fill the TX data to the FIFO */ for (j = 0, i = ((count + 3) / 4); j < i; j++) { |