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authorVille Syrjälä <ville.syrjala@linux.intel.com>2013-10-01 18:02:20 +0300
committerDaniel Vetter <daniel.vetter@ffwll.ch>2013-10-10 12:47:03 +0200
commit0037f71c4b7fc0cc70714c5a076f54f348c04dea (patch)
tree01d71f00f8fd40cfbab2682bc19d70505efcd6b1
parentd1de00efcb4992da3936a4b0300b8b9b244080cd (diff)
drm/i915: WARN if primary plane state doesn't match expectations
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-rw-r--r--drivers/gpu/drm/i915/intel_display.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index a2acf79c365d..2e3289c37034 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1840,6 +1840,8 @@ static void intel_enable_primary_plane(struct drm_i915_private *dev_priv,
/* If the pipe isn't enabled, we can't pump pixels and may hang */
assert_pipe_enabled(dev_priv, pipe);
+ WARN(!intel_crtc->primary_disabled, "Primary plane already enabled\n");
+
intel_crtc->primary_disabled = false;
reg = DSPCNTR(plane);
@@ -1868,6 +1870,8 @@ static void intel_disable_primary_plane(struct drm_i915_private *dev_priv,
int reg;
u32 val;
+ WARN(intel_crtc->primary_disabled, "Primary plane already disabled\n");
+
intel_crtc->primary_disabled = true;
reg = DSPCNTR(plane);