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| author | Takeshi Kihara <takeshi.kihara.df@renesas.com> | 2017-11-16 23:58:40 +0900 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2017-12-05 14:14:54 +0100 |
| commit | 8714a9c1bdd388aa6cff6cd01e357c349300158e (patch) | |
| tree | 0c7406653aa74c9be218f5c188014af9edaf8111 /.mailmap | |
| parent | fbd81e345c9393b96e8ad252eef390f8c6f9cf60 (diff) | |
pinctrl: sh-pfc: r8a7795: Rename RTS{0,1,3,4}# pin function definitions
This patch renames the pin function macro definitions of the GPSR and
IPSR registers value for the RTS{0,1,3,4}# pin.
This is a correction because GPSR and IPSR register specification for
R8A7795 ES2.0 SoC was changed in R-Car Gen3 Hardware User's Manual
Rev.0.54E.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
[geert: Drop remaining "_TANS" from comments]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to '.mailmap')
0 files changed, 0 insertions, 0 deletions