diff options
Diffstat (limited to 'app/boards')
26 files changed, 408 insertions, 146 deletions
diff --git a/app/boards/arm/dz60rgb/pinmux.c b/app/boards/arm/dz60rgb/pinmux.c index 60e231b..f59a31b 100644 --- a/app/boards/arm/dz60rgb/pinmux.c +++ b/app/boards/arm/dz60rgb/pinmux.c @@ -15,55 +15,53 @@ /* pin assignments for STM32F3DISCOVERY board */ static const struct pin_config pinconf[] = { #if DT_NODE_HAS_STATUS(DT_NODELABEL(usart1), okay) && CONFIG_SERIAL - {STM32_PIN_PC4, STM32F3_PINMUX_FUNC_PC4_USART1_TX}, - {STM32_PIN_PC5, STM32F3_PINMUX_FUNC_PC5_USART1_RX}, + {STM32_PIN_PC4, STM32F3_PINMUX_FUNC_PC4_USART1_TX}, + {STM32_PIN_PC5, STM32F3_PINMUX_FUNC_PC5_USART1_RX}, #endif #if DT_NODE_HAS_STATUS(DT_NODELABEL(usart2), okay) && CONFIG_SERIAL - {STM32_PIN_PA2, STM32F3_PINMUX_FUNC_PA2_USART2_TX}, - {STM32_PIN_PA3, STM32F3_PINMUX_FUNC_PA3_USART2_RX}, + {STM32_PIN_PA2, STM32F3_PINMUX_FUNC_PA2_USART2_TX}, + {STM32_PIN_PA3, STM32F3_PINMUX_FUNC_PA3_USART2_RX}, #endif #if DT_NODE_HAS_STATUS(DT_NODELABEL(i2c1), okay) && CONFIG_I2C - {STM32_PIN_PB6, STM32F3_PINMUX_FUNC_PB6_I2C1_SCL}, - {STM32_PIN_PB7, STM32F3_PINMUX_FUNC_PB7_I2C1_SDA}, + {STM32_PIN_PB6, STM32F3_PINMUX_FUNC_PB6_I2C1_SCL}, + {STM32_PIN_PB7, STM32F3_PINMUX_FUNC_PB7_I2C1_SDA}, #endif #if DT_NODE_HAS_STATUS(DT_NODELABEL(i2c2), okay) && CONFIG_I2C - {STM32_PIN_PA9, STM32F3_PINMUX_FUNC_PA9_I2C2_SCL}, - {STM32_PIN_PA10, STM32F3_PINMUX_FUNC_PA10_I2C2_SDA}, + {STM32_PIN_PA9, STM32F3_PINMUX_FUNC_PA9_I2C2_SCL}, + {STM32_PIN_PA10, STM32F3_PINMUX_FUNC_PA10_I2C2_SDA}, #endif #if DT_NODE_HAS_STATUS(DT_NODELABEL(spi1), okay) && CONFIG_SPI #ifdef CONFIG_SPI_STM32_USE_HW_SS - {STM32_PIN_PA4, STM32F3_PINMUX_FUNC_PA4_SPI1_NSS}, + {STM32_PIN_PA4, STM32F3_PINMUX_FUNC_PA4_SPI1_NSS}, #endif /* CONFIG_SPI_STM32_USE_HW_SS */ - {STM32_PIN_PA5, STM32F3_PINMUX_FUNC_PA5_SPI1_SCK}, - {STM32_PIN_PA6, STM32F3_PINMUX_FUNC_PA6_SPI1_MISO}, - {STM32_PIN_PA7, STM32F3_PINMUX_FUNC_PA7_SPI1_MOSI}, + {STM32_PIN_PA5, STM32F3_PINMUX_FUNC_PA5_SPI1_SCK}, + {STM32_PIN_PA6, STM32F3_PINMUX_FUNC_PA6_SPI1_MISO}, + {STM32_PIN_PA7, STM32F3_PINMUX_FUNC_PA7_SPI1_MOSI}, #endif #if DT_NODE_HAS_STATUS(DT_NODELABEL(spi2), okay) && CONFIG_SPI #ifdef CONFIG_SPI_STM32_USE_HW_SS - {STM32_PIN_PB12, STM32F3_PINMUX_FUNC_PB12_SPI2_NSS}, + {STM32_PIN_PB12, STM32F3_PINMUX_FUNC_PB12_SPI2_NSS}, #endif /* CONFIG_SPI_STM32_USE_HW_SS */ - {STM32_PIN_PB13, STM32F3_PINMUX_FUNC_PB13_SPI2_SCK}, - {STM32_PIN_PB14, STM32F3_PINMUX_FUNC_PB14_SPI2_MISO}, - {STM32_PIN_PB15, STM32F3_PINMUX_FUNC_PB15_SPI2_MOSI}, + {STM32_PIN_PB13, STM32F3_PINMUX_FUNC_PB13_SPI2_SCK}, + {STM32_PIN_PB14, STM32F3_PINMUX_FUNC_PB14_SPI2_MISO}, + {STM32_PIN_PB15, STM32F3_PINMUX_FUNC_PB15_SPI2_MOSI}, #endif #ifdef CONFIG_USB_DC_STM32 - {STM32_PIN_PA11, STM32F3_PINMUX_FUNC_PA11_USB_DM}, - {STM32_PIN_PA12, STM32F3_PINMUX_FUNC_PA12_USB_DP}, -#endif /* CONFIG_USB_DC_STM32 */ + {STM32_PIN_PA11, STM32F3_PINMUX_FUNC_PA11_USB_DM}, + {STM32_PIN_PA12, STM32F3_PINMUX_FUNC_PA12_USB_DP}, +#endif /* CONFIG_USB_DC_STM32 */ #if DT_NODE_HAS_STATUS(DT_NODELABEL(can1), okay) && CONFIG_CAN - {STM32_PIN_PD0, STM32F3_PINMUX_FUNC_PD0_CAN1_RX}, - {STM32_PIN_PD1, STM32F3_PINMUX_FUNC_PD1_CAN1_TX}, + {STM32_PIN_PD0, STM32F3_PINMUX_FUNC_PD0_CAN1_RX}, + {STM32_PIN_PD1, STM32F3_PINMUX_FUNC_PD1_CAN1_TX}, #endif }; -static int pinmux_stm32_init(struct device *port) -{ - ARG_UNUSED(port); +static int pinmux_stm32_init(struct device *port) { + ARG_UNUSED(port); - stm32_setup_pins(pinconf, ARRAY_SIZE(pinconf)); + stm32_setup_pins(pinconf, ARRAY_SIZE(pinconf)); - return 0; + return 0; } -SYS_INIT(pinmux_stm32_init, PRE_KERNEL_1, - CONFIG_PINMUX_STM32_DEVICE_INITIALIZATION_PRIORITY);
\ No newline at end of file +SYS_INIT(pinmux_stm32_init, PRE_KERNEL_1, CONFIG_PINMUX_STM32_DEVICE_INITIALIZATION_PRIORITY);
\ No newline at end of file diff --git a/app/boards/arm/nrfmicro/pinmux.c b/app/boards/arm/nrfmicro/pinmux.c index 0536fe0..4e330b6 100644 --- a/app/boards/arm/nrfmicro/pinmux.c +++ b/app/boards/arm/nrfmicro/pinmux.c @@ -11,31 +11,30 @@ #include <sys/sys_io.h> #include <devicetree.h> -static int pinmux_nrfmicro_init(struct device *port) -{ - ARG_UNUSED(port); +static int pinmux_nrfmicro_init(struct device *port) { + ARG_UNUSED(port); - struct device *p1 = device_get_binding("GPIO_1"); + struct device *p1 = device_get_binding("GPIO_1"); #if CONFIG_BOARD_NRFMICRO_13 - struct device *p0 = device_get_binding("GPIO_0"); - // enable EXT_VCC (use 0 for nRFMicro 1.3, use 1 for nRFMicro 1.1) - gpio_pin_configure(p1, 9, GPIO_OUTPUT); - gpio_pin_set(p1, 9, 0); + struct device *p0 = device_get_binding("GPIO_0"); + // enable EXT_VCC (use 0 for nRFMicro 1.3, use 1 for nRFMicro 1.1) + gpio_pin_configure(p1, 9, GPIO_OUTPUT); + gpio_pin_set(p1, 9, 0); #if CONFIG_BOARD_NRFMICRO_CHARGER - gpio_pin_configure(p0, 5, GPIO_OUTPUT); - gpio_pin_set(p0, 5, 0); + gpio_pin_configure(p0, 5, GPIO_OUTPUT); + gpio_pin_set(p0, 5, 0); #else - gpio_pin_configure(p0, 5, GPIO_INPUT); + gpio_pin_configure(p0, 5, GPIO_INPUT); #endif #else // enable EXT_VCC (use 0 for nRFMicro 1.3, use 1 for nRFMicro 1.1) - gpio_pin_configure(p1, 9, GPIO_OUTPUT); - gpio_pin_set(p1, 9, 1); + gpio_pin_configure(p1, 9, GPIO_OUTPUT); + gpio_pin_set(p1, 9, 1); #endif - return 0; + return 0; } SYS_INIT(pinmux_nrfmicro_init, APPLICATION, CONFIG_APPLICATION_INIT_PRIORITY); diff --git a/app/boards/arm/planck/board.cmake b/app/boards/arm/planck/board.cmake index 4843c41..772796d 100644 --- a/app/boards/arm/planck/board.cmake +++ b/app/boards/arm/planck/board.cmake @@ -1,6 +1,7 @@ # SPDX-License-Identifier: MIT +board_runner_args(dfu-util "--pid=0483:df11" "--alt=0" "--dfuse") board_runner_args(jlink "--device=STM32F303VC" "--speed=4000") -include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake) +include(${ZEPHYR_BASE}/boards/common/dfu-util.board.cmake) include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake) diff --git a/app/boards/arm/planck/pinmux.c b/app/boards/arm/planck/pinmux.c index 5df5c90..61cc16a 100644 --- a/app/boards/arm/planck/pinmux.c +++ b/app/boards/arm/planck/pinmux.c @@ -15,55 +15,53 @@ /* pin assignments for STM32F3DISCOVERY board */ static const struct pin_config pinconf[] = { #ifdef CONFIG_UART_1 - {STM32_PIN_PC4, STM32F3_PINMUX_FUNC_PC4_USART1_TX}, - {STM32_PIN_PC5, STM32F3_PINMUX_FUNC_PC5_USART1_RX}, + {STM32_PIN_PC4, STM32F3_PINMUX_FUNC_PC4_USART1_TX}, + {STM32_PIN_PC5, STM32F3_PINMUX_FUNC_PC5_USART1_RX}, #endif /* CONFIG_UART_1 */ #ifdef CONFIG_UART_2 - {STM32_PIN_PA2, STM32F3_PINMUX_FUNC_PA2_USART2_TX}, - {STM32_PIN_PA3, STM32F3_PINMUX_FUNC_PA3_USART2_RX}, + {STM32_PIN_PA2, STM32F3_PINMUX_FUNC_PA2_USART2_TX}, + {STM32_PIN_PA3, STM32F3_PINMUX_FUNC_PA3_USART2_RX}, #endif /* CONFIG_UART_2 */ #ifdef CONFIG_I2C_1 - {STM32_PIN_PB6, STM32F3_PINMUX_FUNC_PB6_I2C1_SCL}, - {STM32_PIN_PB7, STM32F3_PINMUX_FUNC_PB7_I2C1_SDA}, + {STM32_PIN_PB6, STM32F3_PINMUX_FUNC_PB6_I2C1_SCL}, + {STM32_PIN_PB7, STM32F3_PINMUX_FUNC_PB7_I2C1_SDA}, #endif /* CONFIG_I2C_1 */ #ifdef CONFIG_I2C_2 - {STM32_PIN_PA9, STM32F3_PINMUX_FUNC_PA9_I2C2_SCL}, - {STM32_PIN_PA10, STM32F3_PINMUX_FUNC_PA10_I2C2_SDA}, + {STM32_PIN_PA9, STM32F3_PINMUX_FUNC_PA9_I2C2_SCL}, + {STM32_PIN_PA10, STM32F3_PINMUX_FUNC_PA10_I2C2_SDA}, #endif /* CONFIG_I2C_2 */ #ifdef CONFIG_SPI_1 #ifdef CONFIG_SPI_STM32_USE_HW_SS - {STM32_PIN_PA4, STM32F3_PINMUX_FUNC_PA4_SPI1_NSS}, + {STM32_PIN_PA4, STM32F3_PINMUX_FUNC_PA4_SPI1_NSS}, #endif /* CONFIG_SPI_STM32_USE_HW_SS */ - {STM32_PIN_PA5, STM32F3_PINMUX_FUNC_PA5_SPI1_SCK}, - {STM32_PIN_PA6, STM32F3_PINMUX_FUNC_PA6_SPI1_MISO}, - {STM32_PIN_PA7, STM32F3_PINMUX_FUNC_PA7_SPI1_MOSI}, + {STM32_PIN_PA5, STM32F3_PINMUX_FUNC_PA5_SPI1_SCK}, + {STM32_PIN_PA6, STM32F3_PINMUX_FUNC_PA6_SPI1_MISO}, + {STM32_PIN_PA7, STM32F3_PINMUX_FUNC_PA7_SPI1_MOSI}, #endif /* CONFIG_SPI_1 */ #ifdef CONFIG_SPI_2 #ifdef CONFIG_SPI_STM32_USE_HW_SS - {STM32_PIN_PB12, STM32F3_PINMUX_FUNC_PB12_SPI2_NSS}, + {STM32_PIN_PB12, STM32F3_PINMUX_FUNC_PB12_SPI2_NSS}, #endif /* CONFIG_SPI_STM32_USE_HW_SS */ - {STM32_PIN_PB13, STM32F3_PINMUX_FUNC_PB13_SPI2_SCK}, - {STM32_PIN_PB14, STM32F3_PINMUX_FUNC_PB14_SPI2_MISO}, - {STM32_PIN_PB15, STM32F3_PINMUX_FUNC_PB15_SPI2_MOSI}, + {STM32_PIN_PB13, STM32F3_PINMUX_FUNC_PB13_SPI2_SCK}, + {STM32_PIN_PB14, STM32F3_PINMUX_FUNC_PB14_SPI2_MISO}, + {STM32_PIN_PB15, STM32F3_PINMUX_FUNC_PB15_SPI2_MOSI}, #endif /* CONFIG_SPI_2 */ #ifdef CONFIG_USB_DC_STM32 - {STM32_PIN_PA11, STM32F3_PINMUX_FUNC_PA11_USB_DM}, - {STM32_PIN_PA12, STM32F3_PINMUX_FUNC_PA12_USB_DP}, + {STM32_PIN_PA11, STM32F3_PINMUX_FUNC_PA11_USB_DM}, + {STM32_PIN_PA12, STM32F3_PINMUX_FUNC_PA12_USB_DP}, #endif /* CONFIG_USB_DC_STM32 */ #ifdef CONFIG_CAN_1 - {STM32_PIN_PD0, STM32F3_PINMUX_FUNC_PD0_CAN1_RX}, - {STM32_PIN_PD1, STM32F3_PINMUX_FUNC_PD1_CAN1_TX}, + {STM32_PIN_PD0, STM32F3_PINMUX_FUNC_PD0_CAN1_RX}, + {STM32_PIN_PD1, STM32F3_PINMUX_FUNC_PD1_CAN1_TX}, #endif /* CONFIG_CAN_1 */ }; -static int pinmux_stm32_init(struct device *port) -{ - ARG_UNUSED(port); +static int pinmux_stm32_init(struct device *port) { + ARG_UNUSED(port); - stm32_setup_pins(pinconf, ARRAY_SIZE(pinconf)); + stm32_setup_pins(pinconf, ARRAY_SIZE(pinconf)); - return 0; + return 0; } -SYS_INIT(pinmux_stm32_init, PRE_KERNEL_1, - CONFIG_PINMUX_STM32_DEVICE_INITIALIZATION_PRIORITY); +SYS_INIT(pinmux_stm32_init, PRE_KERNEL_1, CONFIG_PINMUX_STM32_DEVICE_INITIALIZATION_PRIORITY); diff --git a/app/boards/arm/proton_c/pinmux.c b/app/boards/arm/proton_c/pinmux.c index a6aaae0..9ffabd7 100644 --- a/app/boards/arm/proton_c/pinmux.c +++ b/app/boards/arm/proton_c/pinmux.c @@ -15,55 +15,53 @@ /* pin assignments for STM32F3DISCOVERY board */ static const struct pin_config pinconf[] = { #if DT_NODE_HAS_STATUS(DT_NODELABEL(usart1), okay) && CONFIG_SERIAL - {STM32_PIN_PC4, STM32F3_PINMUX_FUNC_PC4_USART1_TX}, - {STM32_PIN_PC5, STM32F3_PINMUX_FUNC_PC5_USART1_RX}, + {STM32_PIN_PC4, STM32F3_PINMUX_FUNC_PC4_USART1_TX}, + {STM32_PIN_PC5, STM32F3_PINMUX_FUNC_PC5_USART1_RX}, #endif #if DT_NODE_HAS_STATUS(DT_NODELABEL(usart2), okay) && CONFIG_SERIAL - {STM32_PIN_PA2, STM32F3_PINMUX_FUNC_PA2_USART2_TX}, - {STM32_PIN_PA3, STM32F3_PINMUX_FUNC_PA3_USART2_RX}, + {STM32_PIN_PA2, STM32F3_PINMUX_FUNC_PA2_USART2_TX}, + {STM32_PIN_PA3, STM32F3_PINMUX_FUNC_PA3_USART2_RX}, #endif #if DT_NODE_HAS_STATUS(DT_NODELABEL(i2c1), okay) && CONFIG_I2C - {STM32_PIN_PB6, STM32F3_PINMUX_FUNC_PB6_I2C1_SCL}, - {STM32_PIN_PB7, STM32F3_PINMUX_FUNC_PB7_I2C1_SDA}, + {STM32_PIN_PB6, STM32F3_PINMUX_FUNC_PB6_I2C1_SCL}, + {STM32_PIN_PB7, STM32F3_PINMUX_FUNC_PB7_I2C1_SDA}, #endif #if DT_NODE_HAS_STATUS(DT_NODELABEL(i2c2), okay) && CONFIG_I2C - {STM32_PIN_PA9, STM32F3_PINMUX_FUNC_PA9_I2C2_SCL}, - {STM32_PIN_PA10, STM32F3_PINMUX_FUNC_PA10_I2C2_SDA}, + {STM32_PIN_PA9, STM32F3_PINMUX_FUNC_PA9_I2C2_SCL}, + {STM32_PIN_PA10, STM32F3_PINMUX_FUNC_PA10_I2C2_SDA}, #endif #if DT_NODE_HAS_STATUS(DT_NODELABEL(spi1), okay) && CONFIG_SPI #ifdef CONFIG_SPI_STM32_USE_HW_SS - {STM32_PIN_PA4, STM32F3_PINMUX_FUNC_PA4_SPI1_NSS}, + {STM32_PIN_PA4, STM32F3_PINMUX_FUNC_PA4_SPI1_NSS}, #endif /* CONFIG_SPI_STM32_USE_HW_SS */ - {STM32_PIN_PA5, STM32F3_PINMUX_FUNC_PA5_SPI1_SCK}, - {STM32_PIN_PA6, STM32F3_PINMUX_FUNC_PA6_SPI1_MISO}, - {STM32_PIN_PA7, STM32F3_PINMUX_FUNC_PA7_SPI1_MOSI}, + {STM32_PIN_PA5, STM32F3_PINMUX_FUNC_PA5_SPI1_SCK}, + {STM32_PIN_PA6, STM32F3_PINMUX_FUNC_PA6_SPI1_MISO}, + {STM32_PIN_PA7, STM32F3_PINMUX_FUNC_PA7_SPI1_MOSI}, #endif #if DT_NODE_HAS_STATUS(DT_NODELABEL(spi2), okay) && CONFIG_SPI #ifdef CONFIG_SPI_STM32_USE_HW_SS - {STM32_PIN_PB12, STM32F3_PINMUX_FUNC_PB12_SPI2_NSS}, + {STM32_PIN_PB12, STM32F3_PINMUX_FUNC_PB12_SPI2_NSS}, #endif /* CONFIG_SPI_STM32_USE_HW_SS */ - {STM32_PIN_PB13, STM32F3_PINMUX_FUNC_PB13_SPI2_SCK}, - {STM32_PIN_PB14, STM32F3_PINMUX_FUNC_PB14_SPI2_MISO}, - {STM32_PIN_PB15, STM32F3_PINMUX_FUNC_PB15_SPI2_MOSI}, + {STM32_PIN_PB13, STM32F3_PINMUX_FUNC_PB13_SPI2_SCK}, + {STM32_PIN_PB14, STM32F3_PINMUX_FUNC_PB14_SPI2_MISO}, + {STM32_PIN_PB15, STM32F3_PINMUX_FUNC_PB15_SPI2_MOSI}, #endif #ifdef CONFIG_USB_DC_STM32 - {STM32_PIN_PA11, STM32F3_PINMUX_FUNC_PA11_USB_DM}, - {STM32_PIN_PA12, STM32F3_PINMUX_FUNC_PA12_USB_DP}, -#endif /* CONFIG_USB_DC_STM32 */ + {STM32_PIN_PA11, STM32F3_PINMUX_FUNC_PA11_USB_DM}, + {STM32_PIN_PA12, STM32F3_PINMUX_FUNC_PA12_USB_DP}, +#endif /* CONFIG_USB_DC_STM32 */ #if DT_NODE_HAS_STATUS(DT_NODELABEL(can1), okay) && CONFIG_CAN - {STM32_PIN_PD0, STM32F3_PINMUX_FUNC_PD0_CAN1_RX}, - {STM32_PIN_PD1, STM32F3_PINMUX_FUNC_PD1_CAN1_TX}, + {STM32_PIN_PD0, STM32F3_PINMUX_FUNC_PD0_CAN1_RX}, + {STM32_PIN_PD1, STM32F3_PINMUX_FUNC_PD1_CAN1_TX}, #endif }; -static int pinmux_stm32_init(struct device *port) -{ - ARG_UNUSED(port); +static int pinmux_stm32_init(struct device *port) { + ARG_UNUSED(port); - stm32_setup_pins(pinconf, ARRAY_SIZE(pinconf)); + stm32_setup_pins(pinconf, ARRAY_SIZE(pinconf)); - return 0; + return 0; } -SYS_INIT(pinmux_stm32_init, PRE_KERNEL_1, - CONFIG_PINMUX_STM32_DEVICE_INITIALIZATION_PRIORITY); +SYS_INIT(pinmux_stm32_init, PRE_KERNEL_1, CONFIG_PINMUX_STM32_DEVICE_INITIALIZATION_PRIORITY); diff --git a/app/boards/shields/corne/corne.keymap b/app/boards/shields/corne/corne.keymap index c0bbb4a..5f0f15f 100644 --- a/app/boards/shields/corne/corne.keymap +++ b/app/boards/shields/corne/corne.keymap @@ -1,5 +1,6 @@ #include <behaviors.dtsi> #include <dt-bindings/zmk/keys.h> +#include <dt-bindings/zmk/bt.h> / { keymap { @@ -21,14 +22,14 @@ lower_layer { // ----------------------------------------------------------------------------------------- // | ESC | 1 | 2 | 3 | 4 | 5 | | 6 | 7 | 8 | 9 | 0 | BKSP | -// | CTRL | | | | | | | LFT | DWN | UP | RGT | | | +// | BTCLR| BT1 | BT2 | BT3 | BT4 | BT5 | | LFT | DWN | UP | RGT | | | // | SHFT | | | | | | | | | | | | | // | GUI | | SPC | | ENT | | ALT | bindings = < - &kp ESC &kp NUM_1 &kp NUM_2 &kp NUM_3 &kp NUM_4 &kp NUM_5 &kp NUM_6 &kp NUM_7 &kp NUM_8 &kp NUM_9 &kp NUM_0 &kp BKSP - &kp LCTL &trans &trans &trans &trans &trans &kp LARW &kp DARW &kp UARW &kp RARW &trans &trans - &kp LSFT &trans &trans &trans &trans &trans &trans &trans &trans &trans &trans &trans - &kp LGUI &trans &kp SPC &kp RET &trans &kp RALT + &kp ESC &kp NUM_1 &kp NUM_2 &kp NUM_3 &kp NUM_4 &kp NUM_5 &kp NUM_6 &kp NUM_7 &kp NUM_8 &kp NUM_9 &kp NUM_0 &kp BKSP + &bt BT_CLR &bt BT_SEL 0 &bt BT_SEL 1 &bt BT_SEL 2 &bt BT_SEL 3 &bt BT_SEL 4 &kp LARW &kp DARW &kp UARW &kp RARW &trans &trans + &kp LSFT &trans &trans &trans &trans &trans &trans &trans &trans &trans &trans &trans + &kp LGUI &trans &kp SPC &kp RET &trans &kp RALT >; }; diff --git a/app/boards/shields/iris/iris.keymap b/app/boards/shields/iris/iris.keymap index 46b0817..6042ad7 100644 --- a/app/boards/shields/iris/iris.keymap +++ b/app/boards/shields/iris/iris.keymap @@ -1,8 +1,12 @@ -# Copyright (c) 2020 Pete Johanson, Kurtis Lew -# SPDX-License-Identifier: MIT +/* + * Copyright (c) 2020 Pete Johanson, Kurtis Lew + * + * SPDX-License-Identifier: MIT + */ #include <behaviors.dtsi> #include <dt-bindings/zmk/keys.h> +#include <dt-bindings/zmk/bt.h> / { keymap { @@ -26,17 +30,17 @@ lower_layer { // ------------------------------------------------------------------------------------------------------------ -// | | | | | | | | | | | | | | +// | BTCLR | BT1 | BT2 | BT3 | BT4 | BT5 | | | | | | | | // | F1 | F2 | F3 | F4 | F5 | F6 | | F7 | F8 | F9 | F10 | F11 | F12 | // | ` | ! | @ | # | $ | % | | ^ | & | * | ( | ) | ~ | // | | | | | | | | | | | _ | + | { | } | "|" | // | | | | | | | | bindings = < -&trans &trans &trans &trans &trans &trans &trans &trans &trans &trans &trans &trans -&kp F1 &kp F2 &kp F3 &kp F4 &kp F5 &kp F6 &kp F7 &kp F8 &kp F9 &kp F10 &kp F11 &kp F12 -&kp GRAV &kp BANG &kp ATSN &kp HASH &kp CURU &kp PRCT &kp CRRT &kp AMPS &kp KMLT &kp LPRN &kp RPRN &kp TILD -&trans &trans &trans &trans &trans &trans &trans &trans &trans &kp MINUS &kp KPLS &kp LCUR &kp RCUR &kp PIPE - &trans &trans &trans &trans &trans &trans +&bt BT_CLR &bt BT_SEL 0 &bt BT_SEL 1 &bt BT_SEL 2 &bt BT_SEL 3 &bt BT_SEL 4 &trans &trans &trans &trans &trans &trans +&kp F1 &kp F2 &kp F3 &kp F4 &kp F5 &kp F6 &kp F7 &kp F8 &kp F9 &kp F10 &kp F11 &kp F12 +&kp GRAV &kp BANG &kp ATSN &kp HASH &kp CURU &kp PRCT &kp CRRT &kp AMPS &kp KMLT &kp LPRN &kp RPRN &kp TILD +&trans &trans &trans &trans &trans &trans &trans &trans &trans &kp MINUS &kp KPLS &kp LCUR &kp RCUR &kp PIPE + &trans &trans &trans &trans &trans &trans >; }; diff --git a/app/boards/shields/lily58/lily58.keymap b/app/boards/shields/lily58/lily58.keymap index afd2694..61c19f8 100644 --- a/app/boards/shields/lily58/lily58.keymap +++ b/app/boards/shields/lily58/lily58.keymap @@ -1,5 +1,6 @@ #include <behaviors.dtsi> #include <dt-bindings/zmk/keys.h> +#include <dt-bindings/zmk/bt.h> / { keymap { @@ -25,17 +26,17 @@ lower_layer { // ------------------------------------------------------------------------------------------------------------ -// | | | | | | | | | | | | | | +// | BTCLR | BT1 | BT2 | BT3 | BT4 | BT5 | | | | | | | | // | F1 | F2 | F3 | F4 | F5 | F6 | | F7 | F8 | F9 | F10 | F11 | F12 | // | ` | ! | @ | # | $ | % | | ^ | & | * | ( | ) | ~ | // | | | | | | | | | | | _ | + | { | } | "|" | // | | | | | | | | | | bindings = < -&trans &trans &trans &trans &trans &trans &trans &trans &trans &trans &trans &trans -&kp F1 &kp F2 &kp F3 &kp F4 &kp F5 &kp F6 &kp F7 &kp F8 &kp F9 &kp F10 &kp F11 &kp F12 -&kp GRAV &kp BANG &kp ATSN &kp HASH &kp CURU &kp PRCT &kp CRRT &kp AMPS &kp KMLT &kp LPRN &kp RPRN &kp TILD -&trans &trans &trans &trans &trans &trans &trans &trans &trans &kp MINUS &kp KPLS &kp LCUR &kp RCUR &kp PIPE - &trans &trans &trans &trans &trans &trans &trans &trans +&bt BT_CLR &bt BT_SEL 0 &bt BT_SEL 1 &bt BT_SEL 2 &bt BT_SEL 3 &bt BT_SEL 4 &trans &trans &trans &trans &trans &trans +&kp F1 &kp F2 &kp F3 &kp F4 &kp F5 &kp F6 &kp F7 &kp F8 &kp F9 &kp F10 &kp F11 &kp F12 +&kp GRAV &kp BANG &kp ATSN &kp HASH &kp CURU &kp PRCT &kp CRRT &kp AMPS &kp KMLT &kp LPRN &kp RPRN &kp TILD +&trans &trans &trans &trans &trans &trans &trans &trans &trans &kp MINUS &kp KPLS &kp LCUR &kp RCUR &kp PIPE + &trans &trans &trans &trans &trans &trans &trans &trans >; sensor-bindings = <&inc_dec_cp M_VOLU M_VOLD>; diff --git a/app/boards/shields/qaz/Kconfig.defconfig b/app/boards/shields/qaz/Kconfig.defconfig index f82f458..c84180b 100644 --- a/app/boards/shields/qaz/Kconfig.defconfig +++ b/app/boards/shields/qaz/Kconfig.defconfig @@ -1,5 +1,5 @@ - # Copyright (c) 2020 TJ Campie - # SPDX-License-Identifier: MIT +# Copyright (c) 2020 The ZMK Contributors +# SPDX-License-Identifier: MIT if SHIELD_QAZ diff --git a/app/boards/shields/qaz/Kconfig.shield b/app/boards/shields/qaz/Kconfig.shield index 9da6077..7cc8f1e 100644 --- a/app/boards/shields/qaz/Kconfig.shield +++ b/app/boards/shields/qaz/Kconfig.shield @@ -1,5 +1,5 @@ -# Copyright (c) 2020 TJ Campie +# Copyright (c) 2020 The ZMK Contributors # SPDX-License-Identifier: MIT - - config SHIELD_MY_BOARD - def_bool $(shields_list_contains,qaz) + +config SHIELD_QAZ + def_bool $(shields_list_contains,qaz) diff --git a/app/boards/shields/qaz/qaz.keymap b/app/boards/shields/qaz/qaz.keymap index ffa2f6c..3622972 100644 --- a/app/boards/shields/qaz/qaz.keymap +++ b/app/boards/shields/qaz/qaz.keymap @@ -1,16 +1,30 @@ /* - * Copyright (c) 2020 TJ Campie - * + * Copyright (c) 2020 The ZMK Contributors + * * SPDX-License-Identifier: MIT */ #include <behaviors.dtsi> #include <dt-bindings/zmk/keys.h> +#include <dt-bindings/zmk/bt.h> #define DEFAULT 0 #define NUM_SYM 1 #define NAV 2 - + +/ { + behaviors { + hm: homerow_mods { + compatible = "zmk,behavior-hold-tap"; + label = "homerow mods"; + #binding-cells = <2>; + tapping_term_ms = <225>; + flavor = "tap-preferred"; + bindings = <&kp>, <&kp>; + }; + }; +}; + / { keymap { compatible = "zmk,keymap"; @@ -18,9 +32,9 @@ default_layer { bindings = < &kp Q &kp W &kp E &kp R &kp T &kp Y &kp U &kp I &kp O &kp P - &kp A &kp S &kp D &kp F &kp G &kp H &kp J &kp K &kp L &kp RET + &hm LGUI A &hm LALT S &hm LCTL D &hm LSFT F &kp G &kp H &hm RSFT J &hm RCTL K &hm RALT L &hm RGUI RET &kp Z &kp X &kp C &kp V &kp B &kp N &kp M &kp CMMA &kp DOT - &kp LSFT &kp LGUI &kp LALT &mo NAV &kp SPC &mo NUM_SYM &kp QUOT &kp FSLH + &kp LSFT &kp LGUI &kp LALT < NAV RET < NUM_SYM SPC &kp COLN &kp QUOT &kp FSLH >; }; num_sym { @@ -34,10 +48,10 @@ nav { bindings = < - &none &none &none &none &none &none &none &kp UARW &none &kp BKSP + &bt BT_CLR &bt BT_NXT &bt BT_PRV &none &none &none &none &kp UARW &none &kp BKSP &trans &trans &trans &trans &none &none &kp LARW &kp DARW &kp RARW &none &none &none &none &none &none &none &none &none &none - &none &none &none &none &none &trans &trans &kp RET &trans &kp FSLH + &none &none &none &trans &trans &kp RET &trans &kp FSLH >; }; }; diff --git a/app/boards/shields/qaz/qaz.overlay b/app/boards/shields/qaz/qaz.overlay index 472005b..4e73370 100644 --- a/app/boards/shields/qaz/qaz.overlay +++ b/app/boards/shields/qaz/qaz.overlay @@ -1,6 +1,6 @@ /* - * Copyright (c) 2020 TJ Campie - * + * Copyright (c) 2020 The ZMK Contributors + * * SPDX-License-Identifier: MIT */ diff --git a/app/boards/shields/romac/romac.keymap b/app/boards/shields/romac/romac.keymap index f94a829..97ea9c5 100644 --- a/app/boards/shields/romac/romac.keymap +++ b/app/boards/shields/romac/romac.keymap @@ -6,6 +6,7 @@ #include <behaviors.dtsi> #include <dt-bindings/zmk/keys.h> +#include <dt-bindings/zmk/bt.h> / { keymap { @@ -28,16 +29,16 @@ nav_layer { // ----------------------- -// | _ | HOME | PGUP | -// | _ | END | PGDN | -// | _ | _ | _ | -// | _ | _ | RET | +// | BTNXT | HOME | PGUP | +// | BTPRV | END | PGDN | +// | BTCLR | _ | _ | +// | _ | _ | RET | // ----------------------- bindings = < - &trans &kp HOME &kp PGUP - &trans &kp END &kp PGDN - &trans &trans &trans - &trans &trans &kp RET + &bt BT_NXT &kp HOME &kp PGUP + &bt BT_PRV &kp END &kp PGDN + &bt BT_CLR &trans &trans + &trans &trans &kp RET >; }; }; diff --git a/app/boards/shields/romac_plus/Kconfig.defconfig b/app/boards/shields/romac_plus/Kconfig.defconfig new file mode 100644 index 0000000..c4efdb9 --- /dev/null +++ b/app/boards/shields/romac_plus/Kconfig.defconfig @@ -0,0 +1,9 @@ +# Copyright (c) 2020 The ZMK Contributors +# SPDX-License-Identifier: MIT + +if SHIELD_ROMAC_PLUS + +config ZMK_KEYBOARD_NAME + default "RoMac+ v4" + +endif
\ No newline at end of file diff --git a/app/boards/shields/romac_plus/Kconfig.shield b/app/boards/shields/romac_plus/Kconfig.shield new file mode 100644 index 0000000..a7c7c61 --- /dev/null +++ b/app/boards/shields/romac_plus/Kconfig.shield @@ -0,0 +1,5 @@ +# Copyright (c) 2020 The ZMK Contributors +# SPDX-License-Identifier: MIT + +config SHIELD_ROMAC_PLUS + def_bool $(shields_list_contains,romac_plus) diff --git a/app/boards/shields/romac_plus/boards/nice_nano.overlay b/app/boards/shields/romac_plus/boards/nice_nano.overlay new file mode 100644 index 0000000..a8dafa2 --- /dev/null +++ b/app/boards/shields/romac_plus/boards/nice_nano.overlay @@ -0,0 +1,28 @@ +&spi1 {
+ compatible = "nordic,nrf-spi";
+ status = "okay";
+ mosi-pin = <6>;
+ // Unused pins, needed for SPI definition, but not used by the ws2812 driver itself.
+ sck-pin = <5>;
+ miso-pin = <7>;
+
+ led_strip: ws2812@0 {
+ compatible = "worldsemi,ws2812-spi";
+ label = "WS2812";
+
+ /* SPI */
+ reg = <0>; /* ignored, but necessary for SPI bindings */
+ spi-max-frequency = <4000000>;
+
+ /* WS2812 */
+ chain-length = <10>; /* arbitrary; change at will */
+ spi-one-frame = <0x70>;
+ spi-zero-frame = <0x40>;
+ };
+};
+
+/ {
+ chosen {
+ zmk,underglow = &led_strip;
+ };
+};
\ No newline at end of file diff --git a/app/boards/shields/romac_plus/romac_plus.conf b/app/boards/shields/romac_plus/romac_plus.conf new file mode 100644 index 0000000..d784dc4 --- /dev/null +++ b/app/boards/shields/romac_plus/romac_plus.conf @@ -0,0 +1,6 @@ +# Copyright (c) 2020 The ZMK Contributors
+# SPDX-License-Identifier: MIT
+
+# Uncomment to enable encoder
+#CONFIG_EC11=y
+#CONFIG_EC11_TRIGGER_GLOBAL_THREAD=y
\ No newline at end of file diff --git a/app/boards/shields/romac_plus/romac_plus.dtsi b/app/boards/shields/romac_plus/romac_plus.dtsi new file mode 100644 index 0000000..9b148ca --- /dev/null +++ b/app/boards/shields/romac_plus/romac_plus.dtsi @@ -0,0 +1,56 @@ +/*
+ * Copyright (c) 2020 The ZMK Contributors
+ *
+ * SPDX-License-Identifier: MIT
+ */
+
+#include <dt-bindings/zmk/matrix-transform.h>
+
+/ {
+ chosen {
+ zmk,kscan = &kscan0;
+ zmk,matrix_transform = &default_transform;
+ };
+
+ default_transform: keymap_transform_0 {
+ compatible = "zmk,matrix-transform";
+ columns = <3>;
+ rows = <4>;
+
+ map = <
+RC(0,0) RC(0,1) RC(0,2)
+RC(1,0) RC(1,1) RC(1,2)
+RC(2,0) RC(2,1) RC(2,2)
+RC(3,0) RC(3,1) RC(3,2)
+ >;
+ };
+
+ kscan0: kscan {
+ compatible = "zmk,kscan-gpio-matrix";
+ label = "KSCAN";
+
+ diode-direction = "col2row";
+ row-gpios
+ = <&pro_micro_d 5 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>
+ , <&pro_micro_d 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>
+ , <&pro_micro_d 0 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>
+ , <&pro_micro_d 1 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>
+ ;
+ };
+
+ left_encoder: encoder_left {
+ compatible = "alps,ec11";
+ label = "LEFT_ENCODER";
+ a-gpios = <&pro_micro_d 16 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>;
+ b-gpios = <&pro_micro_d 14 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>;
+ resolution = <4>;
+ status = "disabled";
+ };
+
+ sensors {
+ compatible = "zmk,keymap-sensors";
+ sensors = <&left_encoder>;
+ };
+
+ // TODO: per-key RGB node(s)?
+};
\ No newline at end of file diff --git a/app/boards/shields/romac_plus/romac_plus.keymap b/app/boards/shields/romac_plus/romac_plus.keymap new file mode 100644 index 0000000..d8d1f78 --- /dev/null +++ b/app/boards/shields/romac_plus/romac_plus.keymap @@ -0,0 +1,49 @@ +/* + * Copyright (c) 2020 The ZMK Contributors + * + * SPDX-License-Identifier: MIT + */ + +#include <behaviors.dtsi> +#include <dt-bindings/zmk/bt.h> +#include <dt-bindings/zmk/keys.h> + +/ { + keymap { + compatible = "zmk,keymap"; + + default_layer { +// -------------------------- +// | 7 | 8 | 9 | +// | 4 | 5 | 6 | +// | 1 | 2 | 3 | +// | M_PLAY | 0 | MO(1) | +// -------------------------- + bindings = < + &kp NUM_7 &kp NUM_8 &kp NUM_9 + &kp NUM_4 &kp NUM_5 &kp NUM_6 + &kp NUM_1 &kp NUM_2 &kp NUM_3 + &cp M_PLAY &kp NUM_0 &mo 1 + >; + + sensor-bindings = <&inc_dec_cp M_NEXT M_PREV>; + }; + + nav_layer { +// -------------------------- +// | BT_CLR | HOME | PGUP | +// | _ | END | PGDN | +// | _ | _ | _ | +// | _ | _ | _ | +// -------------------------- + bindings = < + &bt BT_CLR &kp HOME &kp PGUP + &trans &kp END &kp PGDN + &trans &trans &trans + &trans &trans &trans + >; + + sensor-bindings = <&inc_dec_kp A B>; + }; + }; +};
\ No newline at end of file diff --git a/app/boards/shields/romac_plus/romac_plus.overlay b/app/boards/shields/romac_plus/romac_plus.overlay new file mode 100644 index 0000000..8643034 --- /dev/null +++ b/app/boards/shields/romac_plus/romac_plus.overlay @@ -0,0 +1,31 @@ +/* + * Copyright (c) 2020 The ZMK Contributors + * + * SPDX-License-Identifier: MIT + */ + +#include "romac_plus.dtsi" + +/ { + chosen { + zmk,kscan = &kscan0; + }; + + kscan0: kscan { + compatible = "zmk,kscan-gpio-matrix"; + label = "KSCAN"; + + diode-direction = "col2row"; + + col-gpios + = <&pro_micro_a 1 GPIO_ACTIVE_HIGH> + , <&pro_micro_a 2 GPIO_ACTIVE_HIGH> + , <&pro_micro_a 3 GPIO_ACTIVE_HIGH> + ; + }; + +}; + +&left_encoder { + status = "okay"; +};
\ No newline at end of file diff --git a/app/boards/shields/settings_reset/Kconfig.defconfig b/app/boards/shields/settings_reset/Kconfig.defconfig new file mode 100644 index 0000000..6d050cb --- /dev/null +++ b/app/boards/shields/settings_reset/Kconfig.defconfig @@ -0,0 +1,10 @@ +# Copyright (c) 2020 The ZMK Contributors +# SPDX-License-Identifier: MIT + +if SHIELD_SETTINGS_RESET + +config ZMK_KEYBOARD_NAME + default "SETTINGS RESET" + +endif + diff --git a/app/boards/shields/settings_reset/Kconfig.shield b/app/boards/shields/settings_reset/Kconfig.shield new file mode 100644 index 0000000..b5ce97f --- /dev/null +++ b/app/boards/shields/settings_reset/Kconfig.shield @@ -0,0 +1,5 @@ +# Copyright (c) 2020 The ZMK Contributors +# SPDX-License-Identifier: MIT + +config SHIELD_SETTINGS_RESET + def_bool $(shields_list_contains,settings_reset) diff --git a/app/boards/shields/settings_reset/settings_reset.conf b/app/boards/shields/settings_reset/settings_reset.conf new file mode 100644 index 0000000..8052a6c --- /dev/null +++ b/app/boards/shields/settings_reset/settings_reset.conf @@ -0,0 +1 @@ +CONFIG_ZMK_BLE_CLEAR_BONDS_ON_START=y diff --git a/app/boards/shields/settings_reset/settings_reset.keymap b/app/boards/shields/settings_reset/settings_reset.keymap new file mode 100644 index 0000000..0523644 --- /dev/null +++ b/app/boards/shields/settings_reset/settings_reset.keymap @@ -0,0 +1,22 @@ +/* + * Copyright (c) 2020 The ZMK Contributors + * + * SPDX-License-Identifier: MIT + */ + +#include <behaviors.dtsi> +#include <dt-bindings/zmk/keys.h> + +/ { + keymap { + compatible = "zmk,keymap"; + + default_layer { + bindings = < + &reset + >; + }; + }; +}; + + diff --git a/app/boards/shields/settings_reset/settings_reset.overlay b/app/boards/shields/settings_reset/settings_reset.overlay new file mode 100644 index 0000000..a2b5799 --- /dev/null +++ b/app/boards/shields/settings_reset/settings_reset.overlay @@ -0,0 +1,24 @@ +/* + * Copyright (c) 2020 The ZMK Contributors + * + * SPDX-License-Identifier: MIT + */ + +#include <dt-bindings/zmk/matrix-transform.h> + +/ { + chosen { + zmk,kscan = &kscan0; + }; + + kscan0: kscan { + compatible = "zmk,kscan-gpio-direct"; + label = "KSCAN"; + + input-gpios + = <&pro_micro_d 4 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)> + ; + }; + +}; + diff --git a/app/boards/shields/sofle/sofle.keymap b/app/boards/shields/sofle/sofle.keymap index aadffa1..1cbe742 100644 --- a/app/boards/shields/sofle/sofle.keymap +++ b/app/boards/shields/sofle/sofle.keymap @@ -1,5 +1,6 @@ #include <behaviors.dtsi> #include <dt-bindings/zmk/keys.h> +#include <dt-bindings/zmk/bt.h> / { keymap { @@ -44,17 +45,17 @@ raise_layer { // ------------------------------------------------------------------------------------------------------------ -// | | | | | | | | | | | | | | +// |BTCLR| BT1 | BT2 | BT3 | BT4 | BT5 | | | | | | | | // | | INS | PSCR | GUI | | | | PGUP | | ^ | | | | // | | ALT | CTRL | SHIFT | | CAPS | | PGDN | <- | v | -> | DEL | BKSPC | // | | UNDO | CUT | COPY | PASTE | | | | | | | | | | | // | | | | | | | | | | | | bindings = < -&trans &trans &trans &trans &trans &trans &trans &trans &trans &trans &trans &trans -&trans &kp INS &kp PRSC &kp GUI &trans &trans &kp PGUP &trans &kp UARW &trans &kp NUM_0 &trans -&trans &kp LALT &kp LCTL &kp LSFT &trans &kp CLCK &kp PGDN &kp LARW &kp DARW &kp RARW &kp DEL &kp BKSP -&trans &kp UNDO &kp CUT &kp COPY &kp PSTE &trans &trans &trans &trans &trans &trans &trans &trans &trans - &trans &trans &trans &trans &trans &trans &trans &trans &trans &trans +&bt BT_CLR &bt BT_SEL 0 &bt BT_SEL 1 &bt BT_SEL 2 &bt BT_SEL 3 &bt BT_SEL 4 &trans &trans &trans &trans &trans &trans +&trans &kp INS &kp PRSC &kp GUI &trans &trans &kp PGUP &trans &kp UARW &trans &kp NUM_0 &trans +&trans &kp LALT &kp LCTL &kp LSFT &trans &kp CLCK &kp PGDN &kp LARW &kp DARW &kp RARW &kp DEL &kp BKSP +&trans &kp UNDO &kp CUT &kp COPY &kp PSTE &trans &trans &trans &trans &trans &trans &trans &trans &trans + &trans &trans &trans &trans &trans &trans &trans &trans &trans &trans >; sensor-bindings = <&inc_dec_cp M_VOLU M_VOLD &inc_dec_kp PGUP PGDN>; |