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-rw-r--r--app/boards/arm/planck/Kconfig.board2
-rw-r--r--app/boards/arm/planck/Kconfig.defconfig2
-rw-r--r--app/boards/arm/planck/planck_rev6_defconfig3
3 files changed, 2 insertions, 5 deletions
diff --git a/app/boards/arm/planck/Kconfig.board b/app/boards/arm/planck/Kconfig.board
index 0952448..fe15e1a 100644
--- a/app/boards/arm/planck/Kconfig.board
+++ b/app/boards/arm/planck/Kconfig.board
@@ -1,6 +1,6 @@
# Planck V6 board configuration
-# Copyright (c) 2020 Peter Johanson
+# Copyright (c) 2020 The ZMK Contributors
# SPDX-License-Identifier: MIT
config BOARD_PLANCK_REV6
diff --git a/app/boards/arm/planck/Kconfig.defconfig b/app/boards/arm/planck/Kconfig.defconfig
index 93118d4..6f5bf52 100644
--- a/app/boards/arm/planck/Kconfig.defconfig
+++ b/app/boards/arm/planck/Kconfig.defconfig
@@ -1,6 +1,6 @@
# Planck keyboard configuration
-# Copyright (c) 2020 Peter Johanson
+# Copyright (c) 2020 The ZMK Contributors
# SPDX-License-Identifier: MIT
if BOARD_PLANCK_REV6
diff --git a/app/boards/arm/planck/planck_rev6_defconfig b/app/boards/arm/planck/planck_rev6_defconfig
index a440ff1..e34ce00 100644
--- a/app/boards/arm/planck/planck_rev6_defconfig
+++ b/app/boards/arm/planck/planck_rev6_defconfig
@@ -20,9 +20,6 @@ CONFIG_CLOCK_STM32_HSE_CLOCK=8000000
CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y
# use HSE as PLL input
CONFIG_CLOCK_STM32_PLL_SRC_HSE=y
-# however, the board does not have an external oscillator, so just use
-# the 8MHz clock signal coming from integrated STLink
-CONFIG_CLOCK_STM32_HSE_BYPASS=y
# produce 72MHz clock at PLL output
CONFIG_CLOCK_STM32_PLL_PREDIV=1
CONFIG_CLOCK_STM32_PLL_MULTIPLIER=9