diff options
Diffstat (limited to 'app/boards/arm/planck')
| -rw-r--r-- | app/boards/arm/planck/CMakeLists.txt | 9 | ||||
| -rw-r--r-- | app/boards/arm/planck/Kconfig.board | 8 | ||||
| -rw-r--r-- | app/boards/arm/planck/Kconfig.defconfig | 39 | ||||
| -rw-r--r-- | app/boards/arm/planck/board.cmake | 6 | ||||
| -rw-r--r-- | app/boards/arm/planck/pinmux.c | 69 | ||||
| -rw-r--r-- | app/boards/arm/planck/planck_rev6.dts | 162 | ||||
| -rw-r--r-- | app/boards/arm/planck/planck_rev6.yaml | 19 | ||||
| -rw-r--r-- | app/boards/arm/planck/planck_rev6_defconfig | 50 |
8 files changed, 362 insertions, 0 deletions
diff --git a/app/boards/arm/planck/CMakeLists.txt b/app/boards/arm/planck/CMakeLists.txt new file mode 100644 index 0000000..f26de66 --- /dev/null +++ b/app/boards/arm/planck/CMakeLists.txt @@ -0,0 +1,9 @@ +# SPDX-License-Identifier: Apache-2.0 + +list(APPEND EXTRA_DTC_FLAGS "-qq") + +if(CONFIG_PINMUX) +zephyr_library() +zephyr_library_sources(pinmux.c) +zephyr_library_include_directories(${ZEPHYR_BASE}/drivers) +endif() diff --git a/app/boards/arm/planck/Kconfig.board b/app/boards/arm/planck/Kconfig.board new file mode 100644 index 0000000..280b48f --- /dev/null +++ b/app/boards/arm/planck/Kconfig.board @@ -0,0 +1,8 @@ +# STM32F3DISCOVERY board configuration + +# Copyright (c) 2017 I-SENSE group of ICCS +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_STM32F3_DISCO + bool "STM32F3DISCOVERY Development Board" + depends on SOC_STM32F303XC diff --git a/app/boards/arm/planck/Kconfig.defconfig b/app/boards/arm/planck/Kconfig.defconfig new file mode 100644 index 0000000..3ccd178 --- /dev/null +++ b/app/boards/arm/planck/Kconfig.defconfig @@ -0,0 +1,39 @@ +# Planck keyboard configuration + +# Copyright (c) 2017 I-SENSE group of ICCS +# SPDX-License-Identifier: Apache-2.0 + +if BOARD_PLANCK_REV6 + +config BOARD + default "planck_rev6" + +config UART_1 + default y + depends on UART_CONSOLE + +if I2C + +config I2C_1 + default y + +config I2C_2 + default y + +endif # I2C + +if SPI + +config SPI_1 + default y + +config SPI_2 + default y + +endif # SPI + +config CAN_1 + default y + depends on CAN + +endif # BOARD_PLANCK_REV6 diff --git a/app/boards/arm/planck/board.cmake b/app/boards/arm/planck/board.cmake new file mode 100644 index 0000000..e2bdf48 --- /dev/null +++ b/app/boards/arm/planck/board.cmake @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: Apache-2.0 + +board_runner_args(jlink "--device=STM32F303VC" "--speed=4000") + +include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake) +include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake) diff --git a/app/boards/arm/planck/pinmux.c b/app/boards/arm/planck/pinmux.c new file mode 100644 index 0000000..76bd6d1 --- /dev/null +++ b/app/boards/arm/planck/pinmux.c @@ -0,0 +1,69 @@ +/* + * Copyright (c) 2017 I-SENSE group of ICCS + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include <kernel.h> +#include <device.h> +#include <init.h> +#include <drivers/pinmux.h> +#include <sys/sys_io.h> + +#include <pinmux/stm32/pinmux_stm32.h> + +/* pin assignments for STM32F3DISCOVERY board */ +static const struct pin_config pinconf[] = { +#ifdef CONFIG_UART_1 + {STM32_PIN_PC4, STM32F3_PINMUX_FUNC_PC4_USART1_TX}, + {STM32_PIN_PC5, STM32F3_PINMUX_FUNC_PC5_USART1_RX}, +#endif /* CONFIG_UART_1 */ +#ifdef CONFIG_UART_2 + {STM32_PIN_PA2, STM32F3_PINMUX_FUNC_PA2_USART2_TX}, + {STM32_PIN_PA3, STM32F3_PINMUX_FUNC_PA3_USART2_RX}, +#endif /* CONFIG_UART_2 */ +#ifdef CONFIG_I2C_1 + {STM32_PIN_PB6, STM32F3_PINMUX_FUNC_PB6_I2C1_SCL}, + {STM32_PIN_PB7, STM32F3_PINMUX_FUNC_PB7_I2C1_SDA}, +#endif /* CONFIG_I2C_1 */ +#ifdef CONFIG_I2C_2 + {STM32_PIN_PA9, STM32F3_PINMUX_FUNC_PA9_I2C2_SCL}, + {STM32_PIN_PA10, STM32F3_PINMUX_FUNC_PA10_I2C2_SDA}, +#endif /* CONFIG_I2C_2 */ +#ifdef CONFIG_SPI_1 +#ifdef CONFIG_SPI_STM32_USE_HW_SS + {STM32_PIN_PA4, STM32F3_PINMUX_FUNC_PA4_SPI1_NSS}, +#endif /* CONFIG_SPI_STM32_USE_HW_SS */ + {STM32_PIN_PA5, STM32F3_PINMUX_FUNC_PA5_SPI1_SCK}, + {STM32_PIN_PA6, STM32F3_PINMUX_FUNC_PA6_SPI1_MISO}, + {STM32_PIN_PA7, STM32F3_PINMUX_FUNC_PA7_SPI1_MOSI}, +#endif /* CONFIG_SPI_1 */ +#ifdef CONFIG_SPI_2 +#ifdef CONFIG_SPI_STM32_USE_HW_SS + {STM32_PIN_PB12, STM32F3_PINMUX_FUNC_PB12_SPI2_NSS}, +#endif /* CONFIG_SPI_STM32_USE_HW_SS */ + {STM32_PIN_PB13, STM32F3_PINMUX_FUNC_PB13_SPI2_SCK}, + {STM32_PIN_PB14, STM32F3_PINMUX_FUNC_PB14_SPI2_MISO}, + {STM32_PIN_PB15, STM32F3_PINMUX_FUNC_PB15_SPI2_MOSI}, +#endif /* CONFIG_SPI_2 */ +#ifdef CONFIG_USB_DC_STM32 + {STM32_PIN_PA11, STM32F3_PINMUX_FUNC_PA11_USB_DM}, + {STM32_PIN_PA12, STM32F3_PINMUX_FUNC_PA12_USB_DP}, +#endif /* CONFIG_USB_DC_STM32 */ +#ifdef CONFIG_CAN_1 + {STM32_PIN_PD0, STM32F3_PINMUX_FUNC_PD0_CAN1_RX}, + {STM32_PIN_PD1, STM32F3_PINMUX_FUNC_PD1_CAN1_TX}, +#endif /* CONFIG_CAN_1 */ +}; + +static int pinmux_stm32_init(struct device *port) +{ + ARG_UNUSED(port); + + stm32_setup_pins(pinconf, ARRAY_SIZE(pinconf)); + + return 0; +} + +SYS_INIT(pinmux_stm32_init, PRE_KERNEL_1, + CONFIG_PINMUX_STM32_DEVICE_INITIALIZATION_PRIORITY); diff --git a/app/boards/arm/planck/planck_rev6.dts b/app/boards/arm/planck/planck_rev6.dts new file mode 100644 index 0000000..58de7a4 --- /dev/null +++ b/app/boards/arm/planck/planck_rev6.dts @@ -0,0 +1,162 @@ +/* + * Copyright (c) 2017 I-SENSE group of ICCS + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; +#include <st/f3/stm32f303.dtsi> + +/ { + model = "Plack PCD, rev6"; + compatible = "planck,rev6", "st,stm32f303"; + + chosen { + zephyr,console = &usart1; + zephyr,shell-uart = &usart1; + zephyr,sram = &sram0; + zephyr,flash = &flash0; + }; + + leds { + compatible = "gpio-leds"; + red_led_3: led_3 { + gpios = <&gpioe 9 GPIO_ACTIVE_HIGH>; + label = "User LD3"; + }; + blue_led_4: led_4 { + gpios = <&gpioe 8 GPIO_ACTIVE_HIGH>; + label = "User LD4"; + }; + orange_led_5: led_5 { + gpios = <&gpioe 10 GPIO_ACTIVE_HIGH>; + label = "User LD5"; + }; + green_led_6: led_6 { + gpios = <&gpioe 15 GPIO_ACTIVE_HIGH>; + label = "User LD6"; + }; + green_led_7: led_7 { + gpios = <&gpioe 11 GPIO_ACTIVE_HIGH>; + label = "User LD7"; + }; + orange_led_8: led_8 { + gpios = <&gpioe 14 GPIO_ACTIVE_HIGH>; + label = "User LD8"; + }; + blue_led_9: led_9 { + gpios = <&gpioe 12 GPIO_ACTIVE_HIGH>; + label = "User LD9"; + }; + red_led_10: led_10 { + gpios = <&gpioe 13 GPIO_ACTIVE_HIGH>; + label = "User LD10"; + }; + }; + + kscan { + compatible = "gpio-kscan"; + label = "Keyscan Matrix"; + row-gpios = <&gpioa 10 GPIO_ACTIVE_HIGH>, + <&gpioa 9 GPIO_ACTIVE_HIGH>, + <&gpioa 8 GPIO_ACTIVE_HIGH>, + <&gpiob 15 GPIO_ACTIVE_HIGH>, + <&gpioc 13 GPIO_ACTIVE_HIGH>, + <&gpioc 14 GPIO_ACTIVE_HIGH>, + <&gpioc 15 GPIO_ACTIVE_HIGH>, + <&gpioa 2 GPIO_ACTIVE_HIGH>; + col-gpios = <&gpiob 11 GPIO_ACTIVE_HIGH>, + <&gpiob 10 GPIO_ACTIVE_HIGH>, + <&gpiob 2 GPIO_ACTIVE_HIGH>, + <&gpiob 1 GPIO_ACTIVE_HIGH>, + <&gpioa 7 GPIO_ACTIVE_HIGH>, + <&gpiob 0 GPIO_ACTIVE_HIGH>; + }; + + gpio_keys { + compatible = "gpio-keys"; + user_button: button { + label = "User"; + gpios = <&gpioa 0 GPIO_ACTIVE_LOW>; + }; + }; + + aliases { + led0 = &green_led_6; + led1 = &green_led_7; + sw0 = &user_button; + can-primary = &can1; + }; +}; + +&usart1 { + current-speed = <115200>; + status = "okay"; +}; + +&usart2 { + current-speed = <115200>; + status = "okay"; +}; + +&i2c1 { + status = "okay"; + clock-frequency = <I2C_BITRATE_FAST>; + + lsm303dlhc-magn@1e { + compatible = "st,lsm303dlhc-magn"; + reg = <0x1e>; + label = "LSM303DLHC-MAGN"; + }; + + lsm303dlhc-accel@19 { + compatible = "st,lis2dh", "st,lsm303dlhc-accel"; + reg = <0x19>; + irq-gpios = <&gpioe 4 GPIO_ACTIVE_HIGH>, + <&gpioe 5 GPIO_ACTIVE_HIGH>; + label = "LSM303DLHC-ACCEL"; + }; +}; + +&i2c2 { + status = "okay"; + clock-frequency = <I2C_BITRATE_FAST>; +}; + +&spi1 { + status = "okay"; +}; + +&spi2 { + status = "okay"; +}; + +&usb { + status = "okay"; +}; + +&rtc { + status = "okay"; +}; + +&can1 { + status = "okay"; +}; + +&flash0 { + /* + * For more information, see: + * http://docs.zephyrproject.org/latest/guides/dts/index.html#flash-partitions + */ + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + /* Set 6Kb of storage at the end of the 256Kb of flash */ + storage_partition: partition@3e800 { + label = "storage"; + reg = <0x0003e800 0x00001800>; + }; + }; +}; diff --git a/app/boards/arm/planck/planck_rev6.yaml b/app/boards/arm/planck/planck_rev6.yaml new file mode 100644 index 0000000..9c5af3f --- /dev/null +++ b/app/boards/arm/planck/planck_rev6.yaml @@ -0,0 +1,19 @@ +identifier: planck_rev6 +name: PLANKREV6 +type: keyboard +arch: arm +toolchain: + - zephyr + - gnuarmemb + - xtools +ram: 40 +supported: + - gpio + - i2c + - counter + - spi + - usb_device + - lsm303dlhc + - nvs + - can + - kscan diff --git a/app/boards/arm/planck/planck_rev6_defconfig b/app/boards/arm/planck/planck_rev6_defconfig new file mode 100644 index 0000000..17330e2 --- /dev/null +++ b/app/boards/arm/planck/planck_rev6_defconfig @@ -0,0 +1,50 @@ +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_SOC_SERIES_STM32F3X=y +CONFIG_SOC_STM32F303XC=y +# 72MHz system clock +CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000 + +# Floating Point Options +CONFIG_FLOAT=y + +# enable uart driver +CONFIG_SERIAL=y + +# enable console +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y + +#enable I2C +CONFIG_I2C=y + +#enable SPI +CONFIG_SPI=y + +# enable pinmux +CONFIG_PINMUX=y + +# enable GPIO +CONFIG_GPIO=y + +# clock configuration +CONFIG_CLOCK_CONTROL=y + +# kscan matrix +CONFIG_KSCAN=y +CONFIG_KSCAN_GPIO=y + +# Clock configuration for Cube Clock control driver +CONFIG_CLOCK_STM32_HSE_CLOCK=8000000 +CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y +# use HSE as PLL input +CONFIG_CLOCK_STM32_PLL_SRC_HSE=y +# however, the board does not have an external oscillator, so just use +# the 8MHz clock signal coming from integrated STLink +CONFIG_CLOCK_STM32_HSE_BYPASS=y +# produce 72MHz clock at PLL output +CONFIG_CLOCK_STM32_PLL_PREDIV=1 +CONFIG_CLOCK_STM32_PLL_MULTIPLIER=9 +CONFIG_CLOCK_STM32_AHB_PRESCALER=1 +CONFIG_CLOCK_STM32_APB1_PRESCALER=2 +CONFIG_CLOCK_STM32_APB2_PRESCALER=1 |