/*************************************************************************** * __________ __ ___. * Open \______ \ ____ ____ | | _\_ |__ _______ ___ * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ * \/ \/ \/ \/ \/ * $Id: crt0.S 11850 2006-12-29 02:49:12Z markun $ * * Copyright (C) 2002 by Linus Nielsen Feltzing * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version 2 * of the License, or (at your option) any later version. * * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY * KIND, either express or implied. * ****************************************************************************/ #define ASM /* do not include structure definitions from pnx0101.h */ #include "config.h" #include "cpu.h" .section .init.text,"ax",%progbits .global start start: /* Arm bootloader and startup code based on startup.s from the iPodLinux loader * * Copyright (c) 2003, Daniel Palffy (dpalffy (at) rainstorm.org) * Copyright (c) 2005, Bernard Leach * */ msr cpsr_c, #0xd3 /* enter supervisor mode, disable IRQ */ #ifndef BOOTLOADER #ifndef DEBUG ldr r0, =0x80105000 mov r1, #1 str r1, [r0, #4] mov r1, #0 str r1, [r0, #4] 1: ldr r1, [r0] cmp r1, #0 bne 1b mov r1, #0x74 str r1, [r0, #8] mov r1, #2 str r1, [r0, #0x18] mov r1, #2 str r1, [r0, #0x20] mov r1, #82 str r1, [r0, #0x28] mov r1, #100 str r1, [r0, #0x2c] mov r1, #0x120 str r1, [r0, #0x30] mov r1, #6 str r1, [r0, #4] ldr r0, =1f mov r15, r0 1: #endif /* !DEBUG */ #ifndef DEBUG /* Copy exception handler code to address 0 */ ldr r2, =_vectorsstart ldr r3, =_vectorsend ldr r4, =_vectorscopy 1: cmp r3, r2 ldrhi r5, [r4], #4 strhi r5, [r2], #4 bhi 1b #else ldr r1, =vectors ldr r0, =irq_handler str r0, [r1, #24] ldr r0, =fiq_handler str r0, [r1, #28] #endif #ifndef STUB /* Zero out IBSS */ ldr r2, =_iedata ldr r3, =_iend mov r4, #0 1: cmp r3, r2 strhi r4, [r2], #4 bhi 1b /* Copy the IRAM */ ldr r2, =_iramcopy ldr r3, =_iramstart ldr r4, =_iramend 1: cmp r4, r3 ldrhi r5, [r2], #4 strhi r5, [r3], #4 bhi 1b #endif /* !STUB */ #endif /* !BOOTLOADER */ /* Initialise bss section to zero */ ldr r2, =_edata ldr r3, =_end mov r4, #0 1: cmp r3, r2 strhi r4, [r2], #4 bhi 1b /* Set up stack for IRQ mode */ msr cpsr_c, #0xd2 ldr sp, =irq_stack /* Set up stack for FIQ mode */ msr cpsr_c, #0xd1 ldr sp, =fiq_stack /* Let svc, abort and undefined modes use irq stack */ msr cpsr_c, #0xd3 ldr sp =irq_stack msr cpsr_c, #0xd7 ldr sp, =irq_stack msr cpsr_c, #0xdb ldr sp, =irq_stack /* Switch to sys mode */ msr cpsr_c, #0xdf /* Set up some stack and munge it with 0xdeadbeef */ ldr sp, =stackend mov r3, sp ldr r2, =stackbegin ldr r4, =0xdeadbeef 1: cmp r3, r2 strhi r4, [r2], #4 bhi 1b bl main /* main() should never return */ /* Exception handlers. Will be copied to address 0 after memory remapping */ .section .vectors,"aw" ldr pc, [pc, #24] ldr pc, [pc, #24] ldr pc, [pc, #24] ldr pc, [pc, #24] ldr pc, [pc, #24] ldr pc, [pc, #24] ldr pc, [pc, #24] ldr pc, [pc, #24] /* Exception vectors */ .global vectors vectors: .word start .word undef_instr_handler .word software_int_handler .word prefetch_abort_handler .word data_abort_handler .word reserved_handler .word irq_handler .word fiq_handler .text /* All illegal exceptions call into UIE with exception address as first parameter. This is calculated differently depending on which exception we're in. Second parameter is exception number, used for a string lookup in UIE. */ undef_instr_handler: sub r0, lr, #4 mov r1, #0 b UIE /* We run sys mode most of the time, and should never see a software exception being thrown. Make it illegal and call UIE. */ software_int_handler: reserved_handler: sub r0, lr, #4 mov r1, #4 b UIE prefetch_abort_handler: sub r0, lr, #4 mov r1, #1 b UIE fiq_handler: @ Branch straight to FIQ handler in pcm_playback.c. This also handles the @ the correct return sequence. stmfd sp!, {r0-r7, r12, lr} bl fiq ldmfd sp!, {r0-r7, r12, lr} subs pc, lr, #4 data_abort_handler: sub r0, lr, #8 mov r1, #2 b UIE irq_handler: #ifndef STUB stmfd sp!, {r0-r11, r12, lr} bl irq ldmfd sp!, {r0-r11, r12, lr} #endif subs pc, lr, #4 #ifdef STUB UIE: b UIE #endif /* 256 words of IRQ stack */ .space 256*4 irq_stack: /* 256 words of FIQ stack */ .space 256*4 fiq_stack: