Age | Commit message (Collapse) | Author |
|
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@24055 a1c6a512-1295-4272-9138-f99709370657
|
|
For some reason 4 bit widebus is creating issues when writing to the .rockbox directory so revert 4 bit widebus and the revision to the write delay that was added as a fix.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@24054 a1c6a512-1295-4272-9138-f99709370657
|
|
comment
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@24030 a1c6a512-1295-4272-9138-f99709370657
|
|
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@24020 a1c6a512-1295-4272-9138-f99709370657
|
|
internal SD to prevent data corruption.
Making this delay apply to all non-HS SD cards seems to fix some data corruption issues that came up with the switch to 4-bit widebus.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@24019 a1c6a512-1295-4272-9138-f99709370657
|
|
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@24004 a1c6a512-1295-4272-9138-f99709370657
|
|
MCI_RESPONSE_ERROR covers MCI_CMD_TIMEOUT & MCI_CMD_CRC_FAIL and makes it more clear that these are errors in the response and not the command itself.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@24003 a1c6a512-1295-4272-9138-f99709370657
|
|
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@24002 a1c6a512-1295-4272-9138-f99709370657
|
|
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@24001 a1c6a512-1295-4272-9138-f99709370657
|
|
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@24000 a1c6a512-1295-4272-9138-f99709370657
|
|
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23999 a1c6a512-1295-4272-9138-f99709370657
|
|
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23998 a1c6a512-1295-4272-9138-f99709370657
|
|
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23997 a1c6a512-1295-4272-9138-f99709370657
|
|
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23996 a1c6a512-1295-4272-9138-f99709370657
|
|
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23989 a1c6a512-1295-4272-9138-f99709370657
|
|
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23988 a1c6a512-1295-4272-9138-f99709370657
|
|
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23987 a1c6a512-1295-4272-9138-f99709370657
|
|
Initialize LCD pins with pin-setup function.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23986 a1c6a512-1295-4272-9138-f99709370657
|
|
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23985 a1c6a512-1295-4272-9138-f99709370657
|
|
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23984 a1c6a512-1295-4272-9138-f99709370657
|
|
Both the internal and uSD cards are now put into 4 bit widebus mode during initialization except for bootloader.
Add MCI_START_BIT_ERR to MCI_ERROR list and change name to MCI_DATA_ERROR for clarity.
Make appropriate changes to SD error codes.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23977 a1c6a512-1295-4272-9138-f99709370657
|
|
and make it more reliable. Fix ADC problems on initial boot.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23948 a1c6a512-1295-4272-9138-f99709370657
|
|
previously.
This patch changes all references/assumptions of PCLK to IDE_CLK for the internal pl180 controller.
Lower the AS3525_IDE_FREQ to 50 MHz in order to be able to divide by 2 for 25 MHz on the internal SD card.
Adjust the code in debug-as3525.c to account for the change and the frequencies reported should be correct.
Add some #if defined(HAVE_MULTIDRIVE) conditionals to cut out the code dealing with uSD for the clip.
Isolate the write delay needed for low frequency writes to only run for standard speed uSD cards. That is the only case for an MCICLK at 15.5 MHz.
Internal cards run at 25 MHz, HS uSD at 31 MHz, and standard speed uSD cards at 15.5 MHz.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23929 a1c6a512-1295-4272-9138-f99709370657
|
|
compatability,
Some cards need this delay now that we're running at ident speed during this part of the init stage.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23919 a1c6a512-1295-4272-9138-f99709370657
|
|
Addition of a small write delay avoids data crc failures at lower MCICLK frequencies.
Check the actual speed value from the card's CSD register to determine HS status. HS cards can run at twice the speed of standard speed SD cards.
Internal cards & standard speed uSD now run at PCLK/4 = 15.5 MHz. HS uSD cards run at PCLK/2 = 31 MHz.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23901 a1c6a512-1295-4272-9138-f99709370657
|
|
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23894 a1c6a512-1295-4272-9138-f99709370657
|
|
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23892 a1c6a512-1295-4272-9138-f99709370657
|
|
cards get switched to HS timings.
It seems that lowering the operating frequency for the SD cards has made some uSD cards have problems with the init process.
By moving the boost from ident to operating frequency to after the switch to HS timing these card now seem to init normally.
We still need to fix the problem where the internal cards and non HS uSD cards are still slightly overclocked at 31 MHz.
As of now we experience data crc failures during writes at the next lower frequency of 15.5 MHz.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23870 a1c6a512-1295-4272-9138-f99709370657
|
|
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23864 a1c6a512-1295-4272-9138-f99709370657
|
|
references to it. It does use the other non AHB interface.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23836 a1c6a512-1295-4272-9138-f99709370657
|
|
This is within the SD Spec for v2 High Speed cards but still over the 25 MHz limit for v1 and non-HS v2 cards.
Test_disk write & verify passes on both internal and uSD.
The v1 cards still need to be lowered to 15 MHz but that causes data crc failures at this point.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23835 a1c6a512-1295-4272-9138-f99709370657
|
|
missing the bypass bit when resetting frequencies with MCI_CLOCK register.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23831 a1c6a512-1295-4272-9138-f99709370657
|
|
controller.
Currently the bypass bit is not cleared so it's possible to enter the identification phase at bypass speed instead of ident speed.
The simplest solution to ensure the bypass bit is not set is to set the register with an = operation instead of |=.
This makes setting the MCI_CLOCK register at the end of the controller init unnecessary.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23830 a1c6a512-1295-4272-9138-f99709370657
|
|
errors.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23829 a1c6a512-1295-4272-9138-f99709370657
|
|
reduce the size of the DSP code.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23817 a1c6a512-1295-4272-9138-f99709370657
|
|
enable in order to read the registers.
If the controllers were already enabled there was a chance we could try to read the MCI_CLOCK registers while the cards were buffering and then disable the controllers prematurely.
I guess funman knows and sees all!! Thanks funman.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23811 a1c6a512-1295-4272-9138-f99709370657
|
|
we can read the registers immediately.
Because we turn off the clocks to the SD controllers between disk accesses we were unable to read the MCI_CLOCK registers until there was a disk access. Now we can read them immediately.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23810 a1c6a512-1295-4272-9138-f99709370657
|
|
functional changes.
Enabling/disabling of the NAF and IDE clocks is now grouped together as both are related to the internal SD.
Sequence for disabling SD now mirrors the enable sequence.
Comments added to make it easier to follow the configuration change for XPD from gpio to mci-sd and back.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23808 a1c6a512-1295-4272-9138-f99709370657
|
|
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23807 a1c6a512-1295-4272-9138-f99709370657
|
|
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23805 a1c6a512-1295-4272-9138-f99709370657
|
|
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23771 a1c6a512-1295-4272-9138-f99709370657
|
|
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23764 a1c6a512-1295-4272-9138-f99709370657
|
|
- fix some yellows
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23762 a1c6a512-1295-4272-9138-f99709370657
|
|
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23761 a1c6a512-1295-4272-9138-f99709370657
|
|
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23759 a1c6a512-1295-4272-9138-f99709370657
|
|
each sd driver.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23757 a1c6a512-1295-4272-9138-f99709370657
|
|
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23756 a1c6a512-1295-4272-9138-f99709370657
|
|
Use storage api and proper defines for the drive folder instead.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23755 a1c6a512-1295-4272-9138-f99709370657
|
|
implement hotswap and HAVE_HOTSWAP_STORAGE_AS_MAIN.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23754 a1c6a512-1295-4272-9138-f99709370657
|
|
SD_BLOCK_SIZE which is defined in sd.h as 512 bytes.
We had 3 different references to the same value. Rockbox always uses a blocksize of 512 bytes for SD and we were using SECTOR_SIZE, SD_BLOCK_SIZE, & card_info[drive].blocksize to use this value. Now the only reference being used is SD_BLOCK_SIZE.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23746 a1c6a512-1295-4272-9138-f99709370657
|