Age | Commit message (Collapse) | Author |
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Apart from the fact that the original settings were much
to sensitive for my taste, they are now easier configurable.
Change-Id: If1772367fc1f34fa1255f57b1831d1f33dc34558
Reviewed-on: http://gerrit.rockbox.org/772
Reviewed-by: Marcin Bukat <marcin.bukat@gmail.com>
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Change-Id: Iab05c1fa5356efa28a4ee774bfd994b22c5661da
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to compile the bootloader (now it should).
Change-Id: Iba6aa2f118670d66e10451eaf43dd4d83176b06a
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bootloader.
Change-Id: I748a49f4b48385f328946e861d1f9a026b1efd7d
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Change-Id: Ic8e86762f84ca41e931801c1aee08007129eef20
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Change-Id: I603112d2a348abf92d5c8975ea76d3a57fda7cfc
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Change-Id: I0f9968de76ce17710d31f7bc609440654e68b6f1
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Change-Id: I88e9ad54ba65846ae4d94ae03009b3656f2489f2
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Add entry for stmp3700 maximum frequency which is 320MHz.
Change-Id: I6db4aad4efa0a7c1347a1ceb262a0295f63057ae
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For some reason the power subsystem needs to know the relationship between
the VDD{D,A,IO} and uses a weird register to do so.
Change-Id: I7fcc75f6cc0460b4997914986deda7ca544a4940
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Contrary to the imx233, the stmp37xx lcdif doesn't know how to properly
recover from underflow and things are worse because of the errata which
makes the lcdif not clear the fifo. Workaround this by detecting underflow
and taking action: stop dotclk mode (will clear fifo) and schedule next frame.
The dma transfers now write the ctrl register as part of the PIO writes,
making the code simpler.
Change-Id: I15abc24567f322cd03bf2ef7903094f7f0178427
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Change-Id: Ie3fe223ff40abff38bb9b09f398eb5411fa0be4c
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Implement scanning as binary tree in array.
Make the ADC calls fewer without compromising read quality.
Declare the thread function as 'noreturn' to save some stack. Reduce
stack size (regardless, % use is now a bit lower).
Change-Id: I239792fd2a0a2c019d1ec4af1d6d4b466cdf0ef5
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Change-Id: If0a7e11c3e107cb7756c0d70ed5b17fda92b166e
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Change-Id: I4b58dda0953b7f9799238c32b78037b0a5403c04
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Change-Id: I4327740bae17054131feb917abdd58846c451988
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Change-Id: Ib2a6000035d70d687025a78bbea416d77af562fe
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dir.
No code changed, just shuffling stuff around. This should make it easier to
build only select parts kernel and use different implementations.
Change-Id: Ie1f00f93008833ce38419d760afd70062c5e22b5
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Change-Id: Id7eca51aa1c19cbb1798a0c8eeb5105ee4dc4769
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Change-Id: I5f90a9816e9b7ca817fcb3195b63891fda5236f5
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Change-Id: Ic4c8b536fde7a840d3f3f295531cc1253de6320d
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Change-Id: Ic16c6bf988d21c849488489d1b4a3477f2762afb
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Change-Id: I402a2ee1ff11e71702a7a1d6c878eab1e5405313
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Change-Id: Ida1e5b4913131ec671b2d713743e26a28fca6a25
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Change-Id: I14b8f35a556ef07cc5fd43c39c6ad17a1229b4f8
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Change-Id: I5c5bc33d0cc08316e4d853e81a5ba4fb9c5b08d9
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Change-Id: Iad08653f6cdbcfd75d3130186f91ed0b49a04ac9
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Change-Id: I206b16f6374f536ab6d84e84fefc8370a96ef759
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This driver will subsume the old button-lradc driver and support far more
options. It can sense LRADC channels, PSWITCH, GPIOs and it handles special
"buttons" like headphone insertion and hold detection. It also provides a
more natural description of the buttons using a target-defined table with some
macros to make it easy to read and write. It uniformely handles debouncing on
LRADC channels and PSWITCH.
Change-Id: Ie61d1f593fdcf3bd456ba1d53a1fd784286834ce
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On some OSes like Windows or if running in a virtual machine, the one second
timeout might be too short.
Change-Id: I717f7a2aaed1cb3d40e8fbe6f9b1081b43ceea95
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Change-Id: I1be43fec9622cb78fc5737e5ed8d7fda17baf576
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Change-Id: If11d90343d32d5889857e7ba30a99f60a87639f1
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Change-Id: I9dae85eb27337154ddb82015666773a5254cc388
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Original fix by Marcin: it had a problem because crt0 on imx233 is more
complicated than many targets: since we use virtual memory, we first disable
the MMU, then move the entire image (including init and itext stuff), then
setup a temporary stack to setup the MMU. Only when the MMU is enabled, can
we move the init and itext stuff to its right location and finally boot.
This requires some trickery because:
- the initial move copies everything, including init and itext
- the stack overlaps with init and itext to reclaim space
- the temporary stack cannot be the same as the main stack to avoid trashing
the init and itext code, also it needs to be a physical address
Change-Id: Ibaf331c7d90b61f99225d93c9e621eb0f3f8f2dc
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This reverts commit 2b02cbe1ccbf2fcdcc164c6a4139f6666aed23c9.
For some reason it breaks the build, more investigation is needed.
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Rework the irq code, to put more code in the C part. When interrupt
nesting is enable, Rockbox gets pretty unstable so disable it for now.
Change-Id: Iee18b539c80ea408273f6082975faaa87d3ee1b6
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Change-Id: If59aaacdea9f57932464a1615f2b80e410ec50dc
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Change-Id: Ifbc8b10cebb3b7b126f1d6a212f6731f91e234e4
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Change-Id: I37b85e23e6af92939700d640dbea74c646f49b7b
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Change-Id: I990ca2bd43e12047e257f85ff06f046dfa3f94b3
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Change-Id: I9cb456ab60c0d05f202791ed8114a80d2819c399
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Change-Id: I82eac65b1bf9f2e963c4ebfb7c22da678ae63642
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Change-Id: I1a917511e7e1540856815c77c4d996d1b8a03606
Reviewed-on: http://gerrit.rockbox.org/725
Reviewed-by: Amaury Pouly <amaury.pouly@gmail.com>
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Unfortunately the hardware is not very helpful when changing voltage: in DCDC
mode we have the DC_OK_IRQ but in linear regulator mode, the only available
bit doesn't work when lowering the voltages. At the moment, simply sleep for a
little while before a better solution is found.
Change-Id: I89335873e9e42e5c6e9131f40db7839b008c021c
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Change-Id: I0a13444d6788a09b0fc04ed1a5115cb2e5fe6f57
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The old could trigger an immediate IRQ if for example the count was 0
when setting up the timer: since the count was updared *after* clearing the
IRQ, it could fire in between.
Change-Id: I0357b201655bc0e56425ffb249ca807525f30217
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Change-Id: I8886698ed618f9724df2f46d71f36b7443bc821b
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Change-Id: I9d723aa13628e4ab38ee7f648c1923b9e7101d22
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zenxfi2: add support for internal storage on the SD version
The code can now skip devices marked as PROBE if they fail to init, thus
making it possible to handle various kinds of internal storages. The current
code probably doesn't interplay nicely since it acquires pins and never
release them so it will probably break NAND code when it's ready but NAND code
is not ready yet anyway.
Change-Id: I4cb962de4215661e521743a3f511445dbbf28673
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The current code does hazardous tweaks to the power subsystem: indeed if one
boots with USB plugged and some stub powers on the DCDC switch, it will fail.
Indeed, a hardware bug prevents from going back to linear regulators (see
errata) so we cannot expect to reach a known state (linreg on, dcdc off)
on each configuration and in particular, powering down the 4p2 rail in
such a configuration will result in a power brownout.
This commit works around this issue by not touching the initial power
configuration until USB is (un)plugged, which are the best spots to get
known states.
Change-Id: I8741a3995df8ae61ca1c887a3ecb7903d0ac5136
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