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2017-02-04zenmozaic: adjust button voltageAmaury Pouly
The values were recorded for VDDIO at 3.46V and not 3.5 Change-Id: I12880c3d7336389bbac07fe01b8d63d9cd28d177
2017-02-04imx233: remove weak attribute on some functionsAmaury Pouly
This feature was never used and it is not even working because weak linking doesn't work in-between files in a library. Change-Id: I389ea5f17be1d9db0e2150828d704be5a091e09d
2017-02-04nano2g: fix dangerous mutex in hold switchCástor Muñoz
This is a quick patch to solve FS#13104, we can not disable the clickwheel LDO from within interrupt code, so for the moment we leave it enabled all the time, it is unknown how power comsumption is affected when the hold switch is locked. Change-Id: I8f675702e2b5becbcd9197c8b044e6b8daeea79f
2017-02-03Improve code for gmtime_r()Michael Sevakis
Unlike the current code, it does no looping to count days or do table lookups, which means running time doesn't increase with year or month. A good thing if it's call a lot, especially if the algorithm were asked to compute dates centuries or more from the epoch start. As a bonus, handles negative time values. Change-Id: I198a23daf621e40623e6b44dacf2387078b4db9c
2017-02-02In queue_wait_w_tmo, guarantee wait durationMichael Sevakis
It is possible to have a thread awoken and subsequently the message that was placed in the queue has been removed by the time the thread is able to check the queue. Ensure theads that failed to find a message do not return prematurely. It was at worst imprecise when a timeout is specified. It's entirely incorrect if the function ever returns with SYS_TIMEOUT when using TIMEOUT_BLOCK. Change-Id: Ibd41eae8c787adf7a320a24603cf64ff8a6da66a
2017-02-01Fix for Chessbox bug FS#10363William Wilgus
Chessbox was overflowing GameList[240] causing the board to flip + crash GameCnt changed to unsigned char which allows the array to roll over to 0 after 255 define MAX_GAME_CNT 256 and GameList[MAX_GAME_CNT] along with 1 byte GameCnt should fix this issue dbg save routine left in for now to help identify any other problems Added bounds checking to prevent second bug found when loading .pgn files Change-Id: I2b615c8ecbed4368724412f80ce07346f3cf30a7
2017-01-31Remove Whitespaces from chessboxWilliam Wilgus
Remove 1616 Whitespaces from chessbox Change-Id: I84c0dbd4a177eba50b9f7427f5695ae4b266aa5e
2017-01-29i.MX31: Restore screen clearing in DVFS/DPTC debug screenMichael Sevakis
Somewhere along the line the screen stopped being cleared prior to writing new text on each frame, which left visible bits of previously-displayed text when it changed. Change-Id: I344e03c234daa77f4e64ed89281c40db887e4498
2017-01-29Improve imx31 interrupt code for PMIC and GPIOMichael Sevakis
Fix stuff that was bugging me about the way I did it at first. While messing around I found RDS code wasn't masking its GPIO ISR as it should, which might lead to two different interrupts messing with the static data. Change-Id: I54626809ea3039a842af0cc9e3e42853326c4193
2017-01-27sd-as3525v2: simplify logic and cleanupMihail Zenkov
Remove "low power mode clocking" as we stop clocking by hands after each transfer. Remove CGU_IDE and CGU_MEMSTICK as we don't use them. Simplify logic in sd_transfer_sectors. Change-Id: I120396d7ec5c99c62f3a746306aa8edd8686e08a
2017-01-26Move intrinsic RTC implmentation differences to driver filesMichael Sevakis
Some drivers set tm_wday just fine and do not need it coerced to be correct. Others set tm_yday, so don't overwrite what the driver sets; just zero it inside if it can't fill the field. Move calls to set_day_of_week() to the sorts of drivers that presumably required the hammer (FS#11814) in get_time() where the weekday isn't locked to the date. Change-Id: Idd0ded6bfc9d9f48fcc1a6074068164c42fcf24a
2017-01-25AMS: Return ascodec to interrupt-based I2C2 driverMichael Sevakis
1. Slightly revised and regularized internal interface. Callback is used for read and write to provide completion signal instead of having two mechanisms. 2. Lower overhead for asynchronous or alterate completion callbacks. We now only init what is required by the transfer. A couple unneeded structure members were also nixed. 3. Fixes a bug that would neglect a semaphore wait if pumping the I2C interrupts in a loop when not in thread state or interrupts are masked. 4. Corrects broken initialization order by defining KDEV_INIT, which makes kernel_init() call kernel_device_init() to initialize additional devices _after_ the kernel, threading and synchronization objects are safe to use. 5. Locking set_cpu_frequency has to be done at the highest level in system.c to ensure the boost counter and the frequency are both set in agreement. Reconcile the locking inteface between PP and AMS (the only two currently using locking there) to keep it clean. Now works fine with voltages in GIT HEAD on my Fuze v2, type 0. Previously, everything crashed and died instantly. action.c calling set_cpu_frequency from a tick was part of it. The rest may have been related to 3. and 4. Honestly, I'm not certain! Testing by Mihail Zenkov indicates it solves our problems. This will get the developer builds running again after the kernel assert code push. Change-Id: Ie245994fb3e318dd5ef48e383ce61fdd977224d4
2017-01-24hwstub: be more quiet about register description loading failureAmaury Pouly
Change-Id: I0edbb838022b71485179edec7361a6c554a1ab11
2017-01-24hwstub: fix memory leak in net backendAmaury Pouly
Change-Id: I98bef5aa0c518e698c42761d02899adde8bc4aca
2017-01-24imx233: remove redundant lines in linker scriptAmaury Pouly
Change-Id: Ief8ab0c33abdd3b36cd94b0578e2c5cad22bf2a6
2017-01-24hwstub/jz4760b: add lua code to probe for ei/di and ext instructionsAmaury Pouly
Add lua code to check whether ei/di and ext instructions are supported. This is unclear since xburst is somewhere between mips32r1 and mips32r2. Details results are below, but in summary: they don't work (ei has no effect, di/ext cause illegal instruction exceptions) > ./hwstub_shell -q -b -e 'require("jz/misc"); JZ.misc.enable_sram()' \ -f lua/xburst.lua -e "XBURST.test_ext_inst(0xb32d0000)" [...] Selecting soc jz4760b. Redirecting HW to hwstub.soc.jz4760b data: d7168acf error: lua/xburst.lua:209: call failed trapped exception in call > ./hwstub_shell -q -b -e 'require("jz/misc"); JZ.misc.enable_sram()' \ -f lua/xburst.lua -e "XBURST.test_ei_di_inst(0xb32d0000)" [...] Selecting soc jz4760b. Redirecting HW to hwstub.soc.jz4760b Testing ei Test SR Enable interrupts with CP0 SR: 0x1 Disable interrupts with CP0 SR: 0x0 Test ei/di Enable interrupts with ei SR: 0x0 Disable interrupts with di error: lua/xburst.lua:244: call failed trapped exception in call Change-Id: I2e162b5dd5e70488bcd8b58f3ca401a3ecab3c4b
2017-01-24hwstub: rewrite exception catchingAmaury Pouly
Since we can catch exceptions like data aborts on read/write, it takes very little to also catch exceptions in calls. When extending this with the catching of illegal instructions, the call instruction now becomes much more robust and also for address and instruction probing. Since we can catch several types of exception, rename set_data_abort_jmp to set_exception_jmp. At the same time, simplify the logic in read/write request handlers. Also fix a bug in ARM jump code: it was using stmia r1, {..., pc} as if pc would get current pc + 8 but this is actually implementation defined on older ARMs (typically pc + 12) and deprecated on newer ARMs, so rewrite the code avoid that. The set_exception_jmp() function now also reports the exception type. Change-Id: Icd0dd52d2456b361b27c4776be09c3d13528ed93
2017-01-24hwstub/jz460b: implement exception recoveryAmaury Pouly
Now that we now that jz4760b implements EBASE, we can use it to rebase exceptions to use a k1seg address, that maps to the physical address of the TCSM0. It requires to enable HAB1 to have this translation. This most the most inefficient way to access tighly coupled memory ever, but it works. Change-Id: I894ca929c9835696102eb2fef44b06e6eaf96d44
2017-01-24hwstub: add tool to dump memory regions (such as ROM, RAM, or peripherals)Amaury Pouly
Although this case be done with hwstub_shell, this is common enough to deserve its own tool. Change-Id: I9253e40850f37257464548a3acefb14ea083841d
2017-01-24hwstub: small fixes to argument processing and usage()Amaury Pouly
Change-Id: I3daa5e0c3fa2e7eab6a3d75b4c8aa66254d72f3c
2017-01-24hwstub/jz4760b: build packtools automatically if neeededAmaury Pouly
Change-Id: I543e405bf75868d0f7509a35e08fe31ed253e0e6
2017-01-24hwstub: add verbose mode to makeAmaury Pouly
Use make V=1 to print all commands Change-Id: I28bd4151178413f10ddab292f1d582a9d019f5ea
2017-01-24hwstub: fix long transfers failing because of control xfer size of libusbAmaury Pouly
libusb limits control transfer sizes to 4k, see diff for details. Change-Id: Id2e638010274009ea641d06e9040a8b9ab9d54a9
2017-01-24hwstub: fix library sending wrong data on long transfersAmaury Pouly
Change-Id: I886b8dc28e306f631389dbed41451eb086fea4fc
2017-01-24hwstub: add Fiio X3II IPL/SPL dumping codeAmaury Pouly
Change-Id: I76f7cffc700e8051d02936c24e8a70a0f8925edf
2017-01-24hwstub: add Shanling M2 IPL/SPL dumping codeAmaury Pouly
Change-Id: I14987d9783dd371f4990a5bcfbfb2d1c0c9be213
2017-01-24hwstub: add various jz stuff and xburst testsAmaury Pouly
The JZ misc allows to enable and test SRAM. The XBurst code uses the coprocessor interface to analyse the cpu. It also provides a test platform for various features like EBASE and exceptions. I was able to test and confirm that on jz4760b (thus xburst), EBASE works (but top 2 bits are not controllable and always 01). The processor claims to support vector interrupts but this is untested. The values in ConfigX are not to be trusted blindly, clearly some are wrong. I tried to use the JZ4780 Config7 "ebase gate" to change bit 30 of EBASE but it does not work, which suggests that JZ480 uses a newer version of XBurst. Detailled log below: > ./hwstub_shell -q -f lua/xburst.lua -e "XBURST.init()" [...] XBurst: PRId: 0x2ed0024f CPU: JZ4760(B) Config: 0x80000483 Architecture Type: MIPS32 Architecture Level: Release 2 (or more) MMU Type: Standard TLB Config1: 0x3e63318a MMU Size: 32 ICache Sets per way: 128 Ways: 4 Line size: 32 DCache Sets per way: 128 Ways: 4 Line size: 32 FPU: no Config2: 0x80000000 Config3: 0x20 Vectored interrupt: yes Config7: 0x0 > ./hwstub_shell -q -e 'require("jz/misc"); JZ.misc.enable_sram()' \ -f lua/xburst.lua -e "XBURST.test_ebase(0x80000000);XBURST.test_ebase(0xb32d0000) [...] Testing EBASE... Disable BEV SR value: 0x2000fc00 EBASE value: 0x80000000 Value after writing 0x80000000: 0x80000000 Value after writing 0x80040000: 0x80040000 Test result: EBase seems to work Disable config7 gate: write 0x0 to Config7 Value after writing 0xfffff000: 0xbffff000 Enable config7 gate: write 0x80 to Config7 Value after writing 0xc0000000: 0x80000000 Config7 result: Config7 gate does not work Exception test with EBASE at 0x80000000... Writing instructions to memory Old SR: 0x2000fc00 New SR: 0xfc00 EBASE: 80000000 Before: cafebabe After: deadbeef Exception result: Exception and EBASE are working Testing EBASE... Disable BEV SR value: 0x2000fc00 EBASE value: 0x80000000 Value after writing 0x80000000: 0x80000000 Value after writing 0x80040000: 0x80040000 Test result: EBase seems to work Disable config7 gate: write 0x0 to Config7 Value after writing 0xfffff000: 0xbffff000 Enable config7 gate: write 0x80 to Config7 Value after writing 0xc0000000: 0x80000000 Config7 result: Config7 gate does not work Exception test with EBASE at 0xb32d0000... Writing instructions to memory Old SR: 0x2000fc00 New SR: 0xfc00 EBASE: b32d0000 Before: cafebabe After: deadbeef Exception result: Exception and EBASE are working Change-Id: I894227981a141a8c14419b36ed9f519baf145ad1
2017-01-24hwstub: fix bug in jz4760B boot rom backend probeAmaury Pouly
Change-Id: Idb2b3b3903d88c8f6b494d5c9f04778daf3aaed0
2017-01-24hwstub: add support for coprocessor operationsAmaury Pouly
At the moment the stub only implement them for MIPS. Change-Id: Ica835a0e9c70fa5675c3d655eae986e812a47de8
2017-01-24jz4760b/regtools: fix/rename some register fields, add clock analyzer to qeditorAmaury Pouly
Change-Id: I196414d6e4fc18c00b77903e334b7e6adfb7debc
2017-01-24headergen_v2: add two new macros to write a raw write to set/clr variantsAmaury Pouly
These macros are like jz_setf but instead of writing fields, they write a raw value directly: jz_set(REG, value) and jz_clr(REG, value). Change-Id: I660f20dd691b26d367533877875fc3226a26c992
2017-01-24hwstub: implement EXEC command over netAmaury Pouly
Apparently I completely forgot to implement it so using hwstub over net would just fail all EXEC commands :-s Change-Id: I0d0506cbbce9b86c9a4f19036dacc922d1e51338
2017-01-24hwstub: add the possibility to flush caches before execAmaury Pouly
This is needed on the jz4760b because if some data is loaded to DRAM, then it is cached and a disaster lurks if dcaches/icache are not flushed. Targets that needs this must define CONFIG_FLUSH_CACHES in target-config.h and implement target_flush_caches(). Currently MIPS has some generic code for mips32r1 that requires to define {D,I}CACHE_SIZE and {D,I}CACHE_LINE_SIZE in target-config.h Change-Id: I5a3fc085de9445d8c8a2eb61ae4e2dc9bb6b4e8e
2017-01-24jz4760b_tools: improve usbboot toolAmaury Pouly
Change-Id: I21b61a3f56d718bef3aa0cf5096359c463c1f93a
2017-01-24hwstub/jz4760b: fix some typos in lua script after register name changesAmaury Pouly
Change-Id: Ie46ec293fcd5a16143818e77cd6c79cc08620fb5
2017-01-24hwstub: add jz4760b stubAmaury Pouly
The stub is quite versatile: it can be loaded using bootrom or another other means (like factory boot on Fiio X1). It relocates itself to TCSM0 and provides basic functionality (it does not recover from failed read/writes at the moment). Change-Id: Ib646a4b43fba9358d6f93f0f73a5c2e9bcd775a7
2017-01-24update jz4760b register descAmaury Pouly
Change-Id: Id0a071528eca08fe512941be9c8091819e817e4c
2017-01-24hwstub/tools/shell: add JZ4760B and Fiio X1 codeAmaury Pouly
The jz code can do several useful things like dumping the IPL and SPL. The Fiio code can play with backlight and has code do dump the IPL and SPL with the correct parameters (extracted by reverse engineering). Change-Id: I317b3174f5db8d38c9a56670c1d45565142ec208
2017-01-24regtools: add JZ4760B descriptionAmaury Pouly
This is a register description file for the JZ4760B. There are several details worth noticing: - it was obtained by gathering information from several sources/headers, but since there are inconsistencies between them about the exact differences between JZ4760 and JZ4760B, this file probably contains some errors - the register names are not the same as the manual ones (which are not the same as the one in the headers anyway): I dropped the "R" suffix on most registers because it's redundant - Ingenic likes to have read-only registers and then set/clr registers, with very confusing names like DIR/DIRS/DIRC: in the file, the set/clr registers are described as set/clr variants of the original register - Parts of the description were obtained programmatically, which explains why there are empty nodes or partially undocumented registers Change-Id: I8da1d61e172e932e1a4a58ac0a5008f02b1751be
2017-01-24regtools: fix normalization procedureAmaury Pouly
The code was not updated when I added support for list and other stuff, and thus it did not properly sort by addresses. Change-Id: Iaed0717b607beedfb2856c020c2a760e7a5667c5
2017-01-21Fix warnings - got to (void) the statementMichael Sevakis
Change-Id: I85ed5071cbf8e309d06ec14159d6581cf876eb35
2017-01-21Add CPU mode asserts to kernel on blocking functions.Michael Sevakis
This scourge finds it's way back in far too often. Right now, only defined for ARM. Have fun! Change-Id: Ib21be09ebf71dec10dc652a7a664779251f49644
2017-01-21Fix dumb typo in button.c.Michael Sevakis
Forgot to check a non-freq-scaling target. :) Change-Id: Ib19b1b6ebdb3e4ad595aca37a687f32156290a65
2017-01-21action.c must desist in calling set_cpu_frequency from a tickMichael Sevakis
The function is neither reentrant nor ISR callable. Instead of using a ticked-based timeout, have the button driver provide the unboost after a delay when waiting for a button. HAVE_GUI_BOOST gets immediate boost after dequeuing any message, otherwise the queue has to have at least three messages waiting for it to trigger a boost-- essentially the behavior that existed but now combined in one place. Change-Id: I1d924702840f56a1a65abe41fa92b4e753c4e75a
2017-01-18Make consitent internal file API flag behvior, FF_PROBE.Michael Sevakis
FF_PROBE should leave nothing for caller to clean up whether testing only the cache or permitting disk access. Less to worry about. Change-Id: Iea5aa3c1ae7f9025a9de528b127f08e490154048
2017-01-17Selective Backlight Softlock Fix misleading indentation.William Wilgus
Change-Id: Iffbdd3c5bd8d2d23f4f7e3af42e16ab0c1dc312b
2017-01-17Selective Backlight/Advanced Softlock - Selective actions based on contextWilliam Wilgus
Selective backlight allows the user to choose actions that will not enable the backlight when pressed. Advanced softlock allows user to choose actions that will not be blocked by screenlock on devices without a hold button. Both only occur in FM and WPS Contexts. Update: Back from the dead -Cleaned up code, removed unnecessary calls, re-arranged last filter action timeout conditional to work in case last_filtered_action_tick was never set -Added entries to the manual -Fixed back button on some menus not activating backlight -Made menus more intuitive, no actions selected now changes menu item to off. -Added talk fuctionality. -Added option to disable selective backlight while on external power. -Rewrote backlight and softlock handling code to fix issue with scrollwheels -Menu changed to have toggle(yes/no) and settings -Optimized selective actions lookup -Added option to disable notification of 'buttons locked' while softlocked -Removed uneeded code, consolidated action lookup to single function -Fixed incorrect name on selective softlock menu -Added option to disable touch on touchscreen devices -Fixed backlight on original screenlock without selective screenlock active -Added text selection in mask_select for when show_icons is off -Fixed voice in mask_select to speak if voice is defined instead of spelling -Added more lang defines (play skip seek) -Added option to disable unknown keys turning on backlight -Fixed Conditional argument In wrong place causing players without backlight to fail to build -Fixed Disable Unknown blocking detection of context change -Fixed canceling menu didn't update new settings -Added Autolock on backlight off -Removed backlight_on_force from backlight.c, Now sets ignore next to false and uses backlight_on -Cleaned up autolock code added strings to lang file -Fixed issue where rapid presses would bypass softlock -Removed old softlock code, Cleaned selective actions code -Changed menu to match existing RB menus -Fixed Backlight_on_Hold blocked by backlight_ignore_next -Fixed ignore_next for ipod -Fixed bug allowing context with softlock to bypass selective backlight -Changed mask_select to no longer prompt for changes to be saved -Changed menu names -Added ignore timeout to allow ipod scroll wheel to work properly and other players to still work properly, removed some previous code including ignore_event -Increased ignore timeout to prevent sd card accesses from interrupting action code and turning on backlight -Changed Unknown action to unmapped action in menu, changed handling code -Removed unneeded logic and variables for handling unfiltered actions -Reverted unmapped action code to previous functionality -Added manual entries (thanks JohnB) -Removed elusive unhandled unicode character from manual, changed formatting slightly Actions: Volume,Play,Seek,Skip Extras: Disable unmapped actions Disable selective backlight on external power Disable touch during softlock on touchscreen devices Disable softlock notifications (power button still notifies) Autolock on backlight off Method: Adds a function to ignore backlight on next call If selected action occurs backlight is forced on, Filter_first_keypress stays intact. Selective softlock allows selected actions through, bypasses the normal softlock routine. ToDo: DONE previous commit (#1) has attribution for folder_select.c which mask_select is based from. Change-Id: I08132ddcfd64c81751ef23b720f3ec6d68695fe4
2017-01-17Reenable database ramcache and playlist dircacheMichael Sevakis
Playlist dircache references should be back in working order. Reenabling dircache references in the database ramcache is not yet done as it requires quite a bit of rework. Otherwise, the database in RAM is functional again. Some buffer compatibility changes have been made for database commit because the dircache buffer can no longer be stolen, only freed by an API call. Change-Id: Ib57c3e98cb23e798d4439e9da7ebd73826e733a4
2017-01-17Do some debug and preparatory work for ramcache and playlistMichael Sevakis
The file system rework introduced incompatibility between dircache and the tagcache ramcache and playlist dircache path caching. This update makes changes to filesystem code to reintegrate all that. It also fixes a couple bugs that were found when vetting all the code. The filestream cache was being reset without regard to the stream even if it was shared in write mode (made work of .playlist_control). Better handling of unmounting gives files a better go at force-closing them without risk to disk integrity. Did some miscellaneous pedantic changes. Improved efficiency of testing a file's existence (a little) since the path parser will be shared between file code and parsing for the sake of finding dircache references, not duplicated as before. This commit doesn't reenable said items just for the sake of keeping changes separate and related. Plan for the next is to enable dircache again for the playlists (easy peasy) and reenable tagcache ramcache but *without* the dircache path caching because it's rather substantial to change in itself. The ramcache will still function without dircache. Change-Id: I7e2a9910b866251fa8333e1275f72fcfc8425d2d
2017-01-16puzzles: more accurate sin() and cos()Franklin Wei
- now uses fp_sincos() Change-Id: I20c8224cac98fc677097161737d25dd9038bede2