diff options
-rw-r--r-- | apps/buffering.c | 12 | ||||
-rw-r--r-- | firmware/export/config.h | 17 | ||||
-rw-r--r-- | firmware/export/config/ipodnano2g.h | 1 | ||||
-rw-r--r-- | firmware/export/system.h | 18 | ||||
-rw-r--r-- | firmware/target/arm/s5l8700/system-target.h | 5 | ||||
-rw-r--r-- | firmware/target/arm/system-target.h | 5 |
6 files changed, 33 insertions, 25 deletions
diff --git a/apps/buffering.c b/apps/buffering.c index 664a178db0..afc7c7ad6b 100644 --- a/apps/buffering.c +++ b/apps/buffering.c @@ -755,8 +755,7 @@ static void reset_handle(int handle_id) return; /* Align to desired storage alignment */ - alignment_pad = (h->offset - (size_t)(&buffer[h->start])) - & STORAGE_ALIGN_MASK; + alignment_pad = STORAGE_OVERLAP(h->offset - (size_t)(&buffer[h->start])); h->ridx = h->widx = h->data = ringbuf_add(h->start, alignment_pad); if (h == cur_handle) @@ -1022,8 +1021,8 @@ int bufopen(const char *file, size_t offset, enum data_type type, adjusted_offset = 0; /* Reserve extra space because alignment can move data forward */ - struct memory_handle *h = add_handle(size-adjusted_offset+STORAGE_ALIGN_MASK, - can_wrap, false); + size_t padded_size = STORAGE_PAD(size-adjusted_offset); + struct memory_handle *h = add_handle(padded_size, can_wrap, false); if (!h) { DEBUGF("%s(): failed to add handle\n", __func__); @@ -1045,8 +1044,7 @@ int bufopen(const char *file, size_t offset, enum data_type type, h->start = buf_widx; /* Align to desired storage alignment */ - alignment_pad = (adjusted_offset - (size_t)(&buffer[buf_widx])) - & STORAGE_ALIGN_MASK; + alignment_pad = STORAGE_OVERLAP(adjusted_offset - (size_t)(&buffer[buf_widx])); buf_widx = ringbuf_add(buf_widx, alignment_pad); } @@ -1582,7 +1580,7 @@ bool buffering_reset(char *buf, size_t buflen) buffer = buf; /* Preserve alignment when wrapping around */ - buffer_len = buflen & ~STORAGE_ALIGN_MASK; + buffer_len = STORAGE_ALIGN_DOWN(buflen); guard_buffer = buf + buflen; buf_widx = 0; diff --git a/firmware/export/config.h b/firmware/export/config.h index e678590b44..9d8dc41111 100644 --- a/firmware/export/config.h +++ b/firmware/export/config.h @@ -914,23 +914,6 @@ Lyre prototype 1 */ #endif /* HAVE_USBSTACK */ -/* Storage alignment: the mask specifies a mask of bits which should be - * clear in addresses used for storage_{read,write}_sectors(). This is - * only relevant for buffers that will contain one or more whole sectors. - */ - -/* PP502x DMA requires an alignment of at least 16 bytes */ -#ifdef HAVE_ATA_DMA -#ifdef CPU_PP502x -#define STORAGE_ALIGN_MASK 15 -#endif -#endif /* HAVE_ATA_DMA */ - -/* by default no alignment is required */ -#ifndef STORAGE_ALIGN_MASK -#define STORAGE_ALIGN_MASK 0 -#endif - /* This attribute can be used to enable to detection of plugin file handles leaks. * When enabled, the plugin core will monitor open/close/creat and when the plugin exits * will display an error message if the plugin leaked some file handles */ diff --git a/firmware/export/config/ipodnano2g.h b/firmware/export/config/ipodnano2g.h index 0b690416a7..989d56338d 100644 --- a/firmware/export/config/ipodnano2g.h +++ b/firmware/export/config/ipodnano2g.h @@ -219,6 +219,5 @@ //#define IPOD_ACCESSORY_PROTOCOL //#define HAVE_SERIAL -#define STORAGE_ALIGN_MASK 15 #define USB_WRITE_BUFFER_SIZE (1024*64) diff --git a/firmware/export/system.h b/firmware/export/system.h index 505b167af9..fee188802b 100644 --- a/firmware/export/system.h +++ b/firmware/export/system.h @@ -312,6 +312,16 @@ static inline void cpucache_flush(void) /* Aligns a buffer pointer and size to proper boundaries */ #define CACHEALIGN_BUFFER(start, size) \ ALIGN_BUFFER((start), (size), CACHEALIGN_SIZE) +/* Pad a size so the buffer can be aligned later */ +#define CACHE_PAD(x) ((x) + CACHEALIGN_SIZE - 1) +/* Number of bytes in the last cacheline assuming buffer of size x is aligned */ +#define CACHE_OVERLAP(x) (x & (CACHEALIGN_SIZE - 1)) + +#ifdef NEEDS_STORAGE_ALIGN +#define STORAGE_ALIGN_DOWN(x) CACHEALIGN_DOWN(x) +#define STORAGE_PAD(x) CACHE_PAD(x) +#define STORAGE_OVERLAP(x) CACHE_OVERLAP(x) +#endif #else /* ndef PROC_NEEDS_CACHEALIGN */ @@ -323,9 +333,17 @@ static inline void cpucache_flush(void) #define CACHEALIGN_DOWN(x) (x) /* Make no adjustments */ #define CACHEALIGN_BUFFER(start, size) +#define CACHE_PAD(x) (x) +#define CACHE_OVERLAP(x) 0 #endif /* PROC_NEEDS_CACHEALIGN */ +#if !defined(PROC_NEEDS_CACHEALIGN) || !defined(NEEDS_STORAGE_ALIGN) +#define STORAGE_ALIGN_DOWN(x) (x) +#define STORAGE_PAD(x) (x) +#define STORAGE_OVERLAP(x) 0 +#endif + /* Double-cast to avoid 'dereferencing type-punned pointer will * break strict aliasing rules' B.S. */ #define PUN_PTR(type, p) ((type)(intptr_t)(p)) diff --git a/firmware/target/arm/s5l8700/system-target.h b/firmware/target/arm/s5l8700/system-target.h index 81e5c7f7fd..c531344b64 100644 --- a/firmware/target/arm/s5l8700/system-target.h +++ b/firmware/target/arm/s5l8700/system-target.h @@ -29,6 +29,11 @@ #define CPUFREQ_NORMAL 47923200 #define CPUFREQ_MAX 191692800 +/* DMA engine needs aligned addresses */ +#define PROC_NEEDS_CACHEALIGN +#define CACHEALIGN_BITS (4) /* 2^4 = 16 bytes */ +#define NEEDS_STORAGE_ALIGN + #define inl(a) (*(volatile unsigned long *) (a)) #define outl(a,b) (*(volatile unsigned long *) (b) = (a)) #define inb(a) (*(volatile unsigned char *) (a)) diff --git a/firmware/target/arm/system-target.h b/firmware/target/arm/system-target.h index 764cd18d15..1422e6467a 100644 --- a/firmware/target/arm/system-target.h +++ b/firmware/target/arm/system-target.h @@ -22,6 +22,7 @@ #ifndef SYSTEM_TARGET_H #define SYSTEM_TARGET_H +#include "config.h" #include "system-arm.h" #ifdef CPU_PP @@ -162,6 +163,10 @@ static inline void wake_core(int core) #define PROC_NEEDS_CACHEALIGN #define CACHEALIGN_BITS (4) /* 2^4 = 16 bytes */ +#if defined(CPU_PP502x) && defined(HAVE_ATA_DMA) +#define NEEDS_STORAGE_ALIGN +#endif + /** cache functions **/ #ifndef BOOTLOADER #define HAVE_CPUCACHE_INVALIDATE |