/* * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved. */ /* * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * You should have received a copy of the GNU General Public License along * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. */ #include #include #include #include #include #include #include #include #include #include #include "crm_regs.h" #include "devices-imx53.h" #define SMD_FEC_PHY_RST IMX_GPIO_NR(7, 6) #define MX53_SMD_SATA_PWR_EN IMX_GPIO_NR(3, 3) static iomux_v3_cfg_t mx53_smd_pads[] = { MX53_PAD_CSI0_DAT10__UART1_TXD_MUX, MX53_PAD_CSI0_DAT11__UART1_RXD_MUX, MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX, MX53_PAD_PATA_DMARQ__UART2_TXD_MUX, MX53_PAD_PATA_CS_0__UART3_TXD_MUX, MX53_PAD_PATA_CS_1__UART3_RXD_MUX, MX53_PAD_PATA_DA_1__UART3_CTS, MX53_PAD_PATA_DA_2__UART3_RTS, /* I2C1 */ MX53_PAD_CSI0_DAT8__I2C1_SDA, MX53_PAD_CSI0_DAT9__I2C1_SCL, /* SD1 */ MX53_PAD_SD1_CMD__ESDHC1_CMD, MX53_PAD_SD1_CLK__ESDHC1_CLK, MX53_PAD_SD1_DATA0__ESDHC1_DAT0, MX53_PAD_SD1_DATA1__ESDHC1_DAT1, MX53_PAD_SD1_DATA2__ESDHC1_DAT2, MX53_PAD_SD1_DATA3__ESDHC1_DAT3, /* SD2 */ MX53_PAD_SD2_CMD__ESDHC2_CMD, MX53_PAD_SD2_CLK__ESDHC2_CLK, MX53_PAD_SD2_DATA0__ESDHC2_DAT0, MX53_PAD_SD2_DATA1__ESDHC2_DAT1, MX53_PAD_SD2_DATA2__ESDHC2_DAT2, MX53_PAD_SD2_DATA3__ESDHC2_DAT3, /* SD3 */ MX53_PAD_PATA_DATA8__ESDHC3_DAT0, MX53_PAD_PATA_DATA9__ESDHC3_DAT1, MX53_PAD_PATA_DATA10__ESDHC3_DAT2, MX53_PAD_PATA_DATA11__ESDHC3_DAT3, MX53_PAD_PATA_DATA0__ESDHC3_DAT4, MX53_PAD_PATA_DATA1__ESDHC3_DAT5, MX53_PAD_PATA_DATA2__ESDHC3_DAT6, MX53_PAD_PATA_DATA3__ESDHC3_DAT7, MX53_PAD_PATA_IORDY__ESDHC3_CLK, MX53_PAD_PATA_RESET_B__ESDHC3_CMD, }; static const struct imxuart_platform_data mx53_smd_uart_data __initconst = { .flags = IMXUART_HAVE_RTSCTS, }; static inline void mx53_smd_init_uart(void) { imx53_add_imx_uart(0, NULL); imx53_add_imx_uart(1, NULL); imx53_add_imx_uart(2, &mx53_smd_uart_data); } static inline void mx53_smd_fec_reset(void) { int ret; /* reset FEC PHY */ ret = gpio_request(SMD_FEC_PHY_RST, "fec-phy-reset"); if (ret) { printk(KERN_ERR"failed to get GPIO_FEC_PHY_RESET: %d\n", ret); return; } gpio_direction_output(SMD_FEC_PHY_RST, 0); msleep(1); gpio_set_value(SMD_FEC_PHY_RST, 1); } static struct fec_platform_data mx53_smd_fec_data = { .phy = PHY_INTERFACE_MODE_RMII, }; static const struct imxi2c_platform_data mx53_smd_i2c_data __initconst = { .bitrate = 100000, }; static inline void mx53_smd_ahci_pwr_on(void) { int ret; /* Enable SATA PWR */ ret = gpio_request_one(MX53_SMD_SATA_PWR_EN, GPIOF_DIR_OUT | GPIOF_INIT_HIGH, "ahci-sata-pwr"); if (ret) { pr_err("failed to enable SATA_PWR_EN: %d\n", ret); return; } } static void __init mx53_smd_board_init(void) { imx53_soc_init(); mxc_iomux_v3_setup_multiple_pads(mx53_smd_pads, ARRAY_SIZE(mx53_smd_pads)); mx53_smd_init_uart(); mx53_smd_fec_reset(); imx53_add_fec(&mx53_smd_fec_data); imx53_add_imx2_wdt(0, NULL); imx53_add_imx_i2c(0, &mx53_smd_i2c_data); imx53_add_sdhci_esdhc_imx(0, NULL); imx53_add_sdhci_esdhc_imx(1, NULL); imx53_add_sdhci_esdhc_imx(2, NULL); mx53_smd_ahci_pwr_on(); imx53_add_ahci_imx(); } static void __init mx53_smd_timer_init(void) { mx53_clocks_init(32768, 24000000, 22579200, 0); } static struct sys_timer mx53_smd_timer = { .init = mx53_smd_timer_init, }; MACHINE_START(MX53_SMD, "Freescale MX53 SMD Board") .map_io = mx53_map_io, .init_early = imx53_init_early, .init_irq = mx53_init_irq, .timer = &mx53_smd_timer, .init_machine = mx53_smd_board_init, MACHINE_END