From b85a046af3a260e079505e8023ccd10e01cf4f2b Mon Sep 17 00:00:00 2001 From: Paul Mackerras Date: Thu, 6 Oct 2005 10:59:19 +1000 Subject: powerpc: Define 32/64 bit asm macros and use them in fpu.S These macros help in writing assembly code that works for both ppc32 and ppc64. With this we now have a common fpu.S. This takes out load_up_fpu from head_64.S. Signed-off-by: Paul Mackerras --- include/asm-powerpc/ppc_asm.h | 28 +++++++++++++++++++++++----- 1 file changed, 23 insertions(+), 5 deletions(-) (limited to 'include/asm-powerpc/ppc_asm.h') diff --git a/include/asm-powerpc/ppc_asm.h b/include/asm-powerpc/ppc_asm.h index 4efa71878fa9..6cd52c130332 100644 --- a/include/asm-powerpc/ppc_asm.h +++ b/include/asm-powerpc/ppc_asm.h @@ -103,12 +103,13 @@ oris rn,rn,name##@h; \ ori rn,rn,name##@l -#define LOADBASE(rn,name) \ - lis rn,name@highest; \ - ori rn,rn,name@higher; \ - rldicr rn,rn,32,31; \ - oris rn,rn,name@ha +#define LOADBASE(rn,name) \ + .section .toc,"aw"; \ +1: .tc name[TC],name; \ + .previous; \ + ld rn,1b@toc(r2) +#define OFF(name) 0 #define SET_REG_TO_CONST(reg, value) \ lis reg,(((value)>>48)&0xFFFF); \ @@ -123,6 +124,23 @@ rldicr reg,reg,32,31; \ oris reg,reg,(label)@h; \ ori reg,reg,(label)@l; + +/* operations for longs and pointers */ +#define LDL ld +#define STL std +#define CMPI cmpdi + +#else /* 32-bit */ +#define LOADBASE(rn,name) \ + lis rn,name@ha + +#define OFF(name) name@l + +/* operations for longs and pointers */ +#define LDL lwz +#define STL stw +#define CMPI cmpwi + #endif /* various errata or part fixups */ -- cgit v1.2.3