From 8de6fc1e2023954ec21d4e84d002839afed4cad3 Mon Sep 17 00:00:00 2001 From: Samuel Tardieu Date: Thu, 7 Sep 2006 11:57:00 +0200 Subject: [WATCHDOG] w83697hf/hg WDT driver - patch 1 This is patch 1 in the series of patches that converts Marcus Junker's w83697hf watchdog driver to Samuel Tardieau's w83697hf/hg watchdog driver. This patch contains following changes: - the note concerning tyan motherboards has been copied from another driver, This doesn't apply here. - the comments concerning CRF6 are wrong as CRF3 is manipulated and CRF6 is never read nor written. - the comments concerning CRF5 are wrong as CRF4 is manipulated and CRF5 is never read nor written. Signed-off-by: Samuel Tardieu Signed-off-by: Wim Van Sebroeck --- drivers/char/watchdog/w83697hf_wdt.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) (limited to 'drivers') diff --git a/drivers/char/watchdog/w83697hf_wdt.c b/drivers/char/watchdog/w83697hf_wdt.c index 32710a97b161..c31121eab3c9 100644 --- a/drivers/char/watchdog/w83697hf_wdt.c +++ b/drivers/char/watchdog/w83697hf_wdt.c @@ -89,8 +89,6 @@ w83697hf_unselect_wd_register(void) outb_p(0xAA, WDT_EFER); /* Leave extended function mode */ } -/* tyan motherboards seem to set F5 to 0x4C ? - * So explicitly init to appropriate value. */ static void w83697hf_init(void) { @@ -100,15 +98,15 @@ w83697hf_init(void) outb_p(0xF3, WDT_EFER); /* Select CRF3 */ - t=inb_p(WDT_EFDR); /* read CRF6 */ + t=inb_p(WDT_EFDR); /* read CRF3 */ if (t != 0) { printk (KERN_INFO PFX "Watchdog already running. Resetting timeout to %d sec\n", timeout); - outb_p(timeout, WDT_EFDR); /* Write back to CRF6 */ + outb_p(timeout, WDT_EFDR); /* Write back to CRF3 */ } outb_p(0xF4, WDT_EFER); /* Select CRF4 */ t=inb_p(WDT_EFDR); /* read CRF4 */ t&=~0x0C; /* set second mode & disable keyboard turning off watchdog */ - outb_p(t, WDT_EFDR); /* Write back to CRF5 */ + outb_p(t, WDT_EFDR); /* Write back to CRF4 */ w83697hf_unselect_wd_register(); } -- cgit v1.2.3