From cbf1599b3589c6c73999095ca25e9c3f23042e19 Mon Sep 17 00:00:00 2001 From: Deepak Saxena Date: Tue, 1 Nov 2011 14:25:01 -0700 Subject: time: x86: Remove CLOCK_TICK_RATE from acpi_pm clocksource driver The acpi_pm clocksource driver uses CLOCK_TICK_RATE which is defined as PIT_TICK_RATE on x86. This patch cleans it up to just use the later so that CLOCK_TICK_RATE can be depecrated. Signed-off-by: Deepak Saxena Signed-off-by: John Stultz --- drivers/clocksource/acpi_pm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/clocksource/acpi_pm.c b/drivers/clocksource/acpi_pm.c index effe7974aa9a..6b5cf02c35c8 100644 --- a/drivers/clocksource/acpi_pm.c +++ b/drivers/clocksource/acpi_pm.c @@ -143,7 +143,7 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_LE, #ifndef CONFIG_X86_64 #include #define PMTMR_EXPECTED_RATE \ - ((CALIBRATE_LATCH * (PMTMR_TICKS_PER_SEC >> 10)) / (CLOCK_TICK_RATE>>10)) + ((CALIBRATE_LATCH * (PMTMR_TICKS_PER_SEC >> 10)) / (PIT_TICK_RATE>>10)) /* * Some boards have the PMTMR running way too fast. We check * the PMTMR rate against PIT channel 2 to catch these cases. -- cgit v1.2.3 From 5f724e84f91550985a9ae3deb6e0dbc8d8396ed7 Mon Sep 17 00:00:00 2001 From: Deepak Saxena Date: Tue, 1 Nov 2011 14:25:25 -0700 Subject: time: x86: Replace LATCH with PIT_LATCH in i8253 clocksource driver The i8253 clockevent & clocksource driver uses PIT_LATCH except for two cases where it uses LATCH: 1) /* VIA686a test code... reset the latch if count > max + 1 */ if (count > LATCH) { LATCH is based on CLOCK_TICK_RATE which is defined as PIT_TICK_RATE on x86 so this should just be the later. 2) ... switch (mode) { case CLOCK_EVT_MODE_PERIODIC: /* binary, mode 2, LSB/MSB, ch 0 */ outb_p(0x34, PIT_MODE); outb_p(LATCH & 0xff , PIT_CH0); /* LSB */ outb_p(LATCH >> 8 , PIT_CH0); /* MSB */ ... MIPS and ARM are the only other arches that use this driver. In the MIPS case CLOCK_TICK_RATE is defined as the same value as PIT_TICK_RATE. For ARM, the only machine that uses it is Footbridge which has a totally bogus CLOCK_TICK_RATE according to the comments. Furthermore, the clockevent_i8253_init() initializes the clockevent with PIT_TIC_RATE, so there's no reason to use the generic LATCH. This is part of work to remove and depecrate the global CLOCK_TICK_RATE symbol. Signed-off-by: Deepak Saxena Signed-off-by: John Stultz --- drivers/clocksource/i8253.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'drivers') diff --git a/drivers/clocksource/i8253.c b/drivers/clocksource/i8253.c index 27c49e60b7d6..e7cab2da910f 100644 --- a/drivers/clocksource/i8253.c +++ b/drivers/clocksource/i8253.c @@ -53,7 +53,7 @@ static cycle_t i8253_read(struct clocksource *cs) count |= inb_p(PIT_CH0) << 8; /* VIA686a test code... reset the latch if count > max + 1 */ - if (count > LATCH) { + if (count > PIT_LATCH) { outb_p(0x34, PIT_MODE); outb_p(PIT_LATCH & 0xff, PIT_CH0); outb_p(PIT_LATCH >> 8, PIT_CH0); @@ -114,8 +114,8 @@ static void init_pit_timer(enum clock_event_mode mode, case CLOCK_EVT_MODE_PERIODIC: /* binary, mode 2, LSB/MSB, ch 0 */ outb_p(0x34, PIT_MODE); - outb_p(LATCH & 0xff , PIT_CH0); /* LSB */ - outb_p(LATCH >> 8 , PIT_CH0); /* MSB */ + outb_p(PIT_LATCH & 0xff , PIT_CH0); /* LSB */ + outb_p(PIT_LATCH >> 8 , PIT_CH0); /* MSB */ break; case CLOCK_EVT_MODE_SHUTDOWN: -- cgit v1.2.3 From f5a54dd7952e9032785cd1ef0dde72cd61025341 Mon Sep 17 00:00:00 2001 From: John Stultz Date: Fri, 20 May 2011 16:45:37 -0700 Subject: clocksource: Convert tcb_clksrc to use clocksource_register_hz/khz Convert tcb_clksrc to use clocksource_register_hz. CC: Nikolaus Voss CC: Thomas Gleixner Acked-by: Nikolaus Voss Signed-off-by: John Stultz --- drivers/clocksource/tcb_clksrc.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) (limited to 'drivers') diff --git a/drivers/clocksource/tcb_clksrc.c b/drivers/clocksource/tcb_clksrc.c index 79c47e88d5d1..55d0f95f82f9 100644 --- a/drivers/clocksource/tcb_clksrc.c +++ b/drivers/clocksource/tcb_clksrc.c @@ -59,7 +59,6 @@ static struct clocksource clksrc = { .rating = 200, .read = tc_get_cycles, .mask = CLOCKSOURCE_MASK(32), - .shift = 18, .flags = CLOCK_SOURCE_IS_CONTINUOUS, }; @@ -256,7 +255,6 @@ static int __init tcb_clksrc_init(void) best_divisor_idx = i; } - clksrc.mult = clocksource_hz2mult(divided_rate, clksrc.shift); printk(bootinfo, clksrc.name, CONFIG_ATMEL_TCB_CLKSRC_BLOCK, divided_rate / 1000000, @@ -292,7 +290,7 @@ static int __init tcb_clksrc_init(void) __raw_writel(ATMEL_TC_SYNC, tcaddr + ATMEL_TC_BCR); /* and away we go! */ - clocksource_register(&clksrc); + clocksource_register_hz(&clksrc, divided_rate); /* channel 2: periodic and oneshot timer support */ setup_clkevents(tc, clk32k_divisor_idx); -- cgit v1.2.3