From 55b220cafadd71b9f83759f7b396998b2547dc5f Mon Sep 17 00:00:00 2001 From: Ambresh K Date: Wed, 15 Jun 2011 13:40:45 -0700 Subject: gpio/omap4: Fix missing interrupts during device wakeup due to IOPAD. If gpio pins from bank[2-5] are marked as wakeup enable and if the wake is through gpio IO pad wakeup, then that wakeup gpio interrupt is lost. In the current implementation, GPIO driver stores the context of DATAIN of all the gpio in the bank. During GPIO resuming, it checks DATAIN with wakeup enabled pins of gpio bank. If there is status change, then manually toggle GPIO_LEVELDETECT to generate pseudo interrupt. Reported-by: Philippe Mazet Tested-by: Philippe Mazet Signed-off-by: Ambresh K Signed-off-by: Grant Likely --- drivers/gpio/gpio-omap.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c index 01f74a8459d9..35bebde23e83 100644 --- a/drivers/gpio/gpio-omap.c +++ b/drivers/gpio/gpio-omap.c @@ -469,8 +469,9 @@ static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio, + OMAP24XX_GPIO_CLEARWKUENA); } } - /* This part needs to be executed always for OMAP34xx */ - if (cpu_is_omap34xx() || (bank->non_wakeup_gpios & gpio_bit)) { + /* This part needs to be executed always for OMAP{34xx, 44xx} */ + if (cpu_is_omap34xx() || cpu_is_omap44xx() || + (bank->non_wakeup_gpios & gpio_bit)) { /* * Log the edge gpio and manually trigger the IRQ * after resume if the input level changes -- cgit v1.2.3 From 158f1e95180d01ebfd7cd5c8de23050528303f26 Mon Sep 17 00:00:00 2001 From: Randy Dunlap Date: Tue, 14 Jun 2011 17:06:02 -0700 Subject: gpio: include linux/gpio.h where needed Some files use GPIOF_ macros but don't include the header file for them. These macros are being moved to , so add includes for where needed. Signed-off-by: Randy Dunlap Signed-off-by: Grant Likely --- drivers/pcmcia/pxa2xx_vpac270.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers') diff --git a/drivers/pcmcia/pxa2xx_vpac270.c b/drivers/pcmcia/pxa2xx_vpac270.c index 435002dfc3ca..712baab3c83d 100644 --- a/drivers/pcmcia/pxa2xx_vpac270.c +++ b/drivers/pcmcia/pxa2xx_vpac270.c @@ -11,6 +11,7 @@ * */ +#include #include #include -- cgit v1.2.3 From e479c60456ef22b0869432887216186aabaed086 Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Fri, 17 Jun 2011 04:35:37 -0400 Subject: spi/bfin_spi: fix handling of default bits per word setting The default bits per word setting should be 8 bits, but since most of our devices have been explicitly setting this up, we didn't notice when the default stopped working. At the moment, any default transfers without an explicit bit size setting error out with: bfin-spi bfin-spi.0: transfer: unsupported bits_per_word So in the transfer logic, have a bits_per_word setting of 0 fall into the 8 bit transfer logic. Signed-off-by: Mike Frysinger Signed-off-by: Grant Likely --- drivers/spi/spi_bfin5xx.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) (limited to 'drivers') diff --git a/drivers/spi/spi_bfin5xx.c b/drivers/spi/spi_bfin5xx.c index f706dba165cf..cc880c95e7de 100644 --- a/drivers/spi/spi_bfin5xx.c +++ b/drivers/spi/spi_bfin5xx.c @@ -681,13 +681,14 @@ static void bfin_spi_pump_transfers(unsigned long data) drv_data->cs_change = transfer->cs_change; /* Bits per word setup */ - bits_per_word = transfer->bits_per_word ? : message->spi->bits_per_word; - if ((bits_per_word > 0) && (bits_per_word % 16 == 0)) { + bits_per_word = transfer->bits_per_word ? : + message->spi->bits_per_word ? : 8; + if (bits_per_word % 16 == 0) { drv_data->n_bytes = bits_per_word/8; drv_data->len = (transfer->len) >> 1; cr_width = BIT_CTL_WORDSIZE; drv_data->ops = &bfin_bfin_spi_transfer_ops_u16; - } else if ((bits_per_word > 0) && (bits_per_word % 8 == 0)) { + } else if (bits_per_word % 8 == 0) { drv_data->n_bytes = bits_per_word/8; drv_data->len = transfer->len; cr_width = 0; -- cgit v1.2.3