From 73ec94403190c7a3a8c174614ea65f04f0b9617e Mon Sep 17 00:00:00 2001 From: Srinivas Goud Date: Mon, 29 Mar 2021 21:49:36 +0530 Subject: watchdog: of_xilinx_wdt: Used BIT macro Used BIT macro instead of mask value. Signed-off-by: Srinivas Goud Signed-off-by: Michal Simek Signed-off-by: Srinivas Neeli Reviewed-by: Guenter Roeck Link: https://lore.kernel.org/r/20210329161939.37680-3-srinivas.neeli@xilinx.com Signed-off-by: Guenter Roeck Signed-off-by: Wim Van Sebroeck --- drivers/watchdog/of_xilinx_wdt.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) (limited to 'drivers/watchdog') diff --git a/drivers/watchdog/of_xilinx_wdt.c b/drivers/watchdog/of_xilinx_wdt.c index 00549164b3d7..f76ec56859a4 100644 --- a/drivers/watchdog/of_xilinx_wdt.c +++ b/drivers/watchdog/of_xilinx_wdt.c @@ -6,6 +6,7 @@ * (C) Copyright 2011 (Alejandro Cabrera ) */ +#include #include #include #include @@ -24,12 +25,12 @@ #define XWT_TBR_OFFSET 0x8 /* Timebase Register Offset */ /* Control/Status Register Masks */ -#define XWT_CSR0_WRS_MASK 0x00000008 /* Reset status */ -#define XWT_CSR0_WDS_MASK 0x00000004 /* Timer state */ -#define XWT_CSR0_EWDT1_MASK 0x00000002 /* Enable bit 1 */ +#define XWT_CSR0_WRS_MASK BIT(3) /* Reset status */ +#define XWT_CSR0_WDS_MASK BIT(2) /* Timer state */ +#define XWT_CSR0_EWDT1_MASK BIT(1) /* Enable bit 1 */ /* Control/Status Register 0/1 bits */ -#define XWT_CSRX_EWDT2_MASK 0x00000001 /* Enable bit 2 */ +#define XWT_CSRX_EWDT2_MASK BIT(0) /* Enable bit 2 */ /* SelfTest constants */ #define XWT_MAX_SELFTEST_LOOP_COUNT 0x00010000 -- cgit v1.2.3