From af8d30ac64e1ddef50981dc039f5773f57338b1a Mon Sep 17 00:00:00 2001 From: Marek Szyprowski Date: Wed, 21 Feb 2018 11:15:22 +0100 Subject: soc: samsung: pm_domains: Add blacklisting clock handling Handling of clock reparenting will be move to clock controller driver, so add possibility to blacklist clock handling on systems, where the clock controller already does all needed operations. This is needed to avoid potential deadlock on clock reparenting during power domain on/off procedure. Signed-off-by: Marek Szyprowski Reviewed-by: Krzysztof Kozlowski Signed-off-by: Sylwester Nawrocki --- drivers/soc/samsung/pm_domains.c | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'drivers/soc/samsung') diff --git a/drivers/soc/samsung/pm_domains.c b/drivers/soc/samsung/pm_domains.c index b6a436594a19..cef30bdf19b1 100644 --- a/drivers/soc/samsung/pm_domains.c +++ b/drivers/soc/samsung/pm_domains.c @@ -147,6 +147,9 @@ static __init const char *exynos_get_domain_name(struct device_node *node) return kstrdup_const(name, GFP_KERNEL); } +static const char *soc_force_no_clk[] = { +}; + static __init int exynos4_pm_init_power_domain(void) { struct device_node *np; @@ -183,6 +186,11 @@ static __init int exynos4_pm_init_power_domain(void) pd->pd.power_on = exynos_pd_power_on; pd->local_pwr_cfg = pm_domain_cfg->local_pwr_cfg; + for (i = 0; i < ARRAY_SIZE(soc_force_no_clk); i++) + if (of_find_compatible_node(NULL, NULL, + soc_force_no_clk[i])) + goto no_clk; + for (i = 0; i < MAX_CLK_PER_DOMAIN; i++) { char clk_name[8]; -- cgit v1.2.3 From ec4016ff6e60fffab2e34fe87578c6362147cb98 Mon Sep 17 00:00:00 2001 From: Marek Szyprowski Date: Tue, 6 Mar 2018 15:33:09 +0100 Subject: clk: samsung: exynos5420: Move PD-dependent clocks to Exynos5 sub-CMU Clocks related to DISP, GSC and MFC blocks require special handling for power domain turn on/off sequences. Till now this was handled by Exynos power domain driver, but that approach was limited only to some special cases. This patch moves handling of those operations to clock controller driver. This gives more flexibility and allows fine tune values of some clock-specific registers. This patch moves handling of those mentioned clocks to Exynos5 sub-CMU driver instantiated from Exynos5420 driver. Signed-off-by: Marek Szyprowski Acked-by: Krzysztof Kozlowski Signed-off-by: Sylwester Nawrocki --- drivers/soc/samsung/pm_domains.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'drivers/soc/samsung') diff --git a/drivers/soc/samsung/pm_domains.c b/drivers/soc/samsung/pm_domains.c index cef30bdf19b1..f2d6d7a09c16 100644 --- a/drivers/soc/samsung/pm_domains.c +++ b/drivers/soc/samsung/pm_domains.c @@ -148,6 +148,8 @@ static __init const char *exynos_get_domain_name(struct device_node *node) } static const char *soc_force_no_clk[] = { + "samsung,exynos5420-clock", + "samsung,exynos5800-clock", }; static __init int exynos4_pm_init_power_domain(void) -- cgit v1.2.3 From edcefb96fb07f6742fd47ac60915e76c1b77768e Mon Sep 17 00:00:00 2001 From: Marek Szyprowski Date: Tue, 6 Mar 2018 15:33:10 +0100 Subject: clk: samsung: exynos5250: Move PD-dependent clocks to Exynos5 sub-CMU Clocks related to DISP1 block require special handling for power domain turn on/off sequences. Till now this was handled by Exynos power domain driver, but that approach was limited only to some special cases. This patch moves handling of those operations to clock controller driver. This gives more flexibility and allows fine tune values of some clock-specific registers. This patch moves handling of those mentioned clocks to Exynos5 sub-CMU driver instantiated from Exynos5250 driver. Signed-off-by: Marek Szyprowski Acked-by: Krzysztof Kozlowski Signed-off-by: Sylwester Nawrocki --- drivers/soc/samsung/pm_domains.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/soc/samsung') diff --git a/drivers/soc/samsung/pm_domains.c b/drivers/soc/samsung/pm_domains.c index f2d6d7a09c16..caf45cf7aa8e 100644 --- a/drivers/soc/samsung/pm_domains.c +++ b/drivers/soc/samsung/pm_domains.c @@ -148,6 +148,7 @@ static __init const char *exynos_get_domain_name(struct device_node *node) } static const char *soc_force_no_clk[] = { + "samsung,exynos5250-clock", "samsung,exynos5420-clock", "samsung,exynos5800-clock", }; -- cgit v1.2.3