From df2a52a6c8c4995e0bec0b739ddb2f51664837dd Mon Sep 17 00:00:00 2001 From: Jing Huang Date: Thu, 8 Jul 2010 19:54:39 -0700 Subject: [SCSI] bfa: fix chip and memory initialization Clear PSS memory reset that is set as part of power-on-reset (pci reset). Complete PMM memory reset before BISTR start. Clear EDRAM BISTR start bit after fixed delay. BISTR DONE bit status is not getting set. Use a fixed 1ms delay for BISTR now. Expose PMM IT memory definitions to host. Signed-off-by: Jing Huang Signed-off-by: James Bottomley --- drivers/scsi/bfa/include/bfi/bfi_ctreg.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'drivers/scsi/bfa/include') diff --git a/drivers/scsi/bfa/include/bfi/bfi_ctreg.h b/drivers/scsi/bfa/include/bfi/bfi_ctreg.h index 57a8497105af..c0ef5a93b797 100644 --- a/drivers/scsi/bfa/include/bfi/bfi_ctreg.h +++ b/drivers/scsi/bfa/include/bfi/bfi_ctreg.h @@ -455,6 +455,9 @@ enum { #define __PSS_LPU0_RAM_ERR 0x00000001 #define ERR_SET_REG 0x00018818 #define __PSS_ERR_STATUS_SET 0x003fffff +#define PMM_1T_RESET_REG_P0 0x0002381c +#define __PMM_1T_RESET_P 0x00000001 +#define PMM_1T_RESET_REG_P1 0x00023c1c #define HQM_QSET0_RXQ_DRBL_P0 0x00038000 #define __RXQ0_ADD_VECTORS_P 0x80000000 #define __RXQ0_STOP_P 0x40000000 -- cgit v1.2.3