From 5cadafb236dffd8aa4772b32bf848af9128faedc Mon Sep 17 00:00:00 2001 From: Bart Van Assche Date: Fri, 13 Jan 2017 10:41:52 -0800 Subject: target/cxgbit: Fix endianness annotations This patch does not change any functionality but avoids that sparse complains about endianness. Signed-off-by: Bart Van Assche Acked-by: Varun Prakash Signed-off-by: Nicholas Bellinger --- drivers/net/ethernet/chelsio/libcxgb/libcxgb_ppm.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/net/ethernet/chelsio') diff --git a/drivers/net/ethernet/chelsio/libcxgb/libcxgb_ppm.h b/drivers/net/ethernet/chelsio/libcxgb/libcxgb_ppm.h index e995a1a3840a..a91ad766cef0 100644 --- a/drivers/net/ethernet/chelsio/libcxgb/libcxgb_ppm.h +++ b/drivers/net/ethernet/chelsio/libcxgb/libcxgb_ppm.h @@ -59,7 +59,7 @@ struct cxgbi_pagepod_hdr { #define PPOD_PAGES_MAX 4 struct cxgbi_pagepod { struct cxgbi_pagepod_hdr hdr; - u64 addr[PPOD_PAGES_MAX + 1]; + __be64 addr[PPOD_PAGES_MAX + 1]; }; /* ddp tag format -- cgit v1.2.3 From bdec5188745c4f03ecbc5b88bc2c3f76acb435ae Mon Sep 17 00:00:00 2001 From: Varun Prakash Date: Tue, 24 Jan 2017 17:07:02 +0530 Subject: target/cxgbit: Use T6 specific macro to set the force bit For T6 adapters use T6 specific macro to set the force bit. Signed-off-by: Varun Prakash Signed-off-by: Bart Van Assche Signed-off-by: Nicholas Bellinger --- drivers/net/ethernet/chelsio/cxgb4/t4_msg.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'drivers/net/ethernet/chelsio') diff --git a/drivers/net/ethernet/chelsio/cxgb4/t4_msg.h b/drivers/net/ethernet/chelsio/cxgb4/t4_msg.h index a267173f5997..21fc2fe1fc10 100644 --- a/drivers/net/ethernet/chelsio/cxgb4/t4_msg.h +++ b/drivers/net/ethernet/chelsio/cxgb4/t4_msg.h @@ -1349,6 +1349,10 @@ struct cpl_tx_data { #define TX_FORCE_S 13 #define TX_FORCE_V(x) ((x) << TX_FORCE_S) +#define T6_TX_FORCE_S 20 +#define T6_TX_FORCE_V(x) ((x) << T6_TX_FORCE_S) +#define T6_TX_FORCE_F T6_TX_FORCE_V(1U) + enum { ULP_TX_MEM_READ = 2, ULP_TX_MEM_WRITE = 3, -- cgit v1.2.3