From 0bbb194c0c33c251ac3d33f46c8fd045d82350e5 Mon Sep 17 00:00:00 2001 From: Suzuki K Poulose Date: Tue, 10 Oct 2017 14:32:12 -0600 Subject: coresight: Extend the PIDR mask to cover relevant bits in PIDR2 As per coresight standards, PIDR2 register has the following format : [2-0] - JEP106_bits6to4 [3] - JEDEC, designer ID is specified by JEDEC. However some of the drivers only use mask of 0x3 for the PIDR2 leaving bits [3-2] unchecked, which could potentially match the component for a different device altogether. This patch fixes the mask and the corresponding id bits for the existing devices. Cc: Mathieu Poirier Cc: Linus Walleij Signed-off-by: Suzuki K Poulose Signed-off-by: Mathieu Poirier Signed-off-by: Greg Kroah-Hartman --- drivers/hwtracing/coresight/coresight-tpiu.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers/hwtracing/coresight/coresight-tpiu.c') diff --git a/drivers/hwtracing/coresight/coresight-tpiu.c b/drivers/hwtracing/coresight/coresight-tpiu.c index d7a3e453016d..bef49a3a5ca7 100644 --- a/drivers/hwtracing/coresight/coresight-tpiu.c +++ b/drivers/hwtracing/coresight/coresight-tpiu.c @@ -194,8 +194,8 @@ static const struct dev_pm_ops tpiu_dev_pm_ops = { static const struct amba_id tpiu_ids[] = { { - .id = 0x0003b912, - .mask = 0x0003ffff, + .id = 0x000bb912, + .mask = 0x000fffff, }, { .id = 0x0004b912, -- cgit v1.2.3