From 54d04ea8cdbd143496e4f5cc9c0a9f86c0e55a2e Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Christian=20K=C3=B6nig?= Date: Mon, 7 Sep 2020 13:44:36 +0200 Subject: drm/ttm: merge offset and base in ttm_bus_placement MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This is used by TTM to communicate the physical address which should be used with ioremap(), ioremap_wc(). We don't need to separate the base and offset in any way here. Signed-off-by: Christian König Reviewed-by: Dave Airlie Link: https://patchwork.freedesktop.org/patch/389457/ --- drivers/gpu/drm/qxl/qxl_ttm.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) (limited to 'drivers/gpu/drm/qxl/qxl_ttm.c') diff --git a/drivers/gpu/drm/qxl/qxl_ttm.c b/drivers/gpu/drm/qxl/qxl_ttm.c index 3ab460339145..19b18ea38c34 100644 --- a/drivers/gpu/drm/qxl/qxl_ttm.c +++ b/drivers/gpu/drm/qxl/qxl_ttm.c @@ -81,13 +81,12 @@ int qxl_ttm_io_mem_reserve(struct ttm_bo_device *bdev, return 0; case TTM_PL_VRAM: mem->bus.is_iomem = true; - mem->bus.base = qdev->vram_base; - mem->bus.offset = mem->start << PAGE_SHIFT; + mem->bus.offset = (mem->start << PAGE_SHIFT) + qdev->vram_base; break; case TTM_PL_PRIV: mem->bus.is_iomem = true; - mem->bus.base = qdev->surfaceram_base; - mem->bus.offset = mem->start << PAGE_SHIFT; + mem->bus.offset = (mem->start << PAGE_SHIFT) + + qdev->surfaceram_base; break; default: return -EINVAL; -- cgit v1.2.3