From 5dd45e2cd2470dc91c1af8548eaa266796d9cf8c Mon Sep 17 00:00:00 2001 From: Andrzej Hajda Date: Wed, 23 Mar 2016 14:15:13 +0100 Subject: drm/exynos/hdmi: add PHY power off signal handling HDMI-PHY power off bit defaults to 0 in older HDMI versions. In case of Exynos5433 it defaults to 1. To make code consistent across all versions this bit is always unset/set in power on/off sequences. Signed-off-by: Andrzej Hajda Signed-off-by: Inki Dae --- drivers/gpu/drm/exynos/exynos_hdmi.c | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'drivers/gpu/drm/exynos') diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c b/drivers/gpu/drm/exynos/exynos_hdmi.c index 8faf3151242a..3f1eb07e365c 100644 --- a/drivers/gpu/drm/exynos/exynos_hdmi.c +++ b/drivers/gpu/drm/exynos/exynos_hdmi.c @@ -1754,6 +1754,8 @@ static void hdmi_enable(struct drm_encoder *encoder) hdmi_set_refclk(hdata, true); + hdmi_reg_writemask(hdata, HDMI_PHY_CON_0, 0, HDMI_PHY_POWER_OFF_EN); + hdmi_conf_apply(hdata); hdata->powered = true; @@ -1786,6 +1788,8 @@ static void hdmi_disable(struct drm_encoder *encoder) cancel_delayed_work(&hdata->hotplug_work); + hdmi_reg_writemask(hdata, HDMI_PHY_CON_0, ~0, HDMI_PHY_POWER_OFF_EN); + hdmi_set_refclk(hdata, false); regmap_update_bits(hdata->pmureg, PMU_HDMI_PHY_CONTROL, -- cgit v1.2.3