From 61e309f322f264917e5dcbd7ea773df1db53629a Mon Sep 17 00:00:00 2001 From: Doug Anderson Date: Mon, 6 Oct 2014 10:15:27 -0700 Subject: clk: rockchip: Add CLK_SET_RATE_PARENT to aclk_cpu_pre We'd like to be able to call clk_set_rate() on aclk_cpu (a gate) at bootup. In order for this to have any effect we need its parent (aclk_cpu_pre) to percolate the rate change to _its_ parent (aclk_cpu_src). Add CLK_SET_RATE_PARENT to make this happen. Signed-off-by: Doug Anderson Signed-off-by: Heiko Stuebner --- drivers/clk/rockchip/clk-rk3288.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/clk/rockchip') diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c index e41ae1f4cd29..4670bd8335a1 100644 --- a/drivers/clk/rockchip/clk-rk3288.c +++ b/drivers/clk/rockchip/clk-rk3288.c @@ -279,7 +279,7 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = { RK3288_CLKGATE_CON(0), 11, GFLAGS), COMPOSITE_NOGATE(0, "aclk_cpu_src", mux_aclk_cpu_src_p, 0, RK3288_CLKSEL_CON(1), 15, 1, MFLAGS, 3, 5, DFLAGS), - DIV(0, "aclk_cpu_pre", "aclk_cpu_src", 0, + DIV(0, "aclk_cpu_pre", "aclk_cpu_src", CLK_SET_RATE_PARENT, RK3288_CLKSEL_CON(1), 0, 3, DFLAGS), GATE(ACLK_CPU, "aclk_cpu", "aclk_cpu_pre", 0, RK3288_CLKGATE_CON(0), 3, GFLAGS), -- cgit v1.2.3