From db092ee6509ecd3f65843202982a8e2ff9e74cdd Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Thu, 8 Nov 2007 19:21:50 +0900 Subject: sh: Move sh64 boards to arch/sh/. Signed-off-by: Paul Mundt --- arch/sh/mach-cayman/Makefile | 11 ++ arch/sh/mach-cayman/iomap.c | 22 ++++ arch/sh/mach-cayman/irq.c | 195 +++++++++++++++++++++++++++++++++ arch/sh/mach-cayman/led.c | 51 +++++++++ arch/sh/mach-cayman/setup.c | 239 +++++++++++++++++++++++++++++++++++++++++ arch/sh/mach-harp/Makefile | 1 + arch/sh/mach-harp/setup.c | 129 ++++++++++++++++++++++ arch/sh/mach-sim/Makefile | 1 + arch/sh/mach-sim/setup.c | 126 ++++++++++++++++++++++ arch/sh64/mach-cayman/Makefile | 11 -- arch/sh64/mach-cayman/iomap.c | 22 ---- arch/sh64/mach-cayman/irq.c | 195 --------------------------------- arch/sh64/mach-cayman/led.c | 51 --------- arch/sh64/mach-cayman/setup.c | 239 ----------------------------------------- arch/sh64/mach-harp/Makefile | 1 - arch/sh64/mach-harp/setup.c | 129 ---------------------- arch/sh64/mach-sim/Makefile | 1 - arch/sh64/mach-sim/setup.c | 126 ---------------------- 18 files changed, 775 insertions(+), 775 deletions(-) create mode 100644 arch/sh/mach-cayman/Makefile create mode 100644 arch/sh/mach-cayman/iomap.c create mode 100644 arch/sh/mach-cayman/irq.c create mode 100644 arch/sh/mach-cayman/led.c create mode 100644 arch/sh/mach-cayman/setup.c create mode 100644 arch/sh/mach-harp/Makefile create mode 100644 arch/sh/mach-harp/setup.c create mode 100644 arch/sh/mach-sim/Makefile create mode 100644 arch/sh/mach-sim/setup.c delete mode 100644 arch/sh64/mach-cayman/Makefile delete mode 100644 arch/sh64/mach-cayman/iomap.c delete mode 100644 arch/sh64/mach-cayman/irq.c delete mode 100644 arch/sh64/mach-cayman/led.c delete mode 100644 arch/sh64/mach-cayman/setup.c delete mode 100644 arch/sh64/mach-harp/Makefile delete mode 100644 arch/sh64/mach-harp/setup.c delete mode 100644 arch/sh64/mach-sim/Makefile delete mode 100644 arch/sh64/mach-sim/setup.c (limited to 'arch') diff --git a/arch/sh/mach-cayman/Makefile b/arch/sh/mach-cayman/Makefile new file mode 100644 index 000000000000..67a2258bf8c4 --- /dev/null +++ b/arch/sh/mach-cayman/Makefile @@ -0,0 +1,11 @@ +# +# Makefile for the Hitachi Cayman specific parts of the kernel +# +# Note! Dependencies are done automagically by 'make dep', which also +# removes any old dependencies. DON'T put your own dependencies here +# unless it's something special (ie not a .c file). +# + +obj-y := setup.o irq.o iomap.o +obj-$(CONFIG_HEARTBEAT) += led.o + diff --git a/arch/sh/mach-cayman/iomap.c b/arch/sh/mach-cayman/iomap.c new file mode 100644 index 000000000000..a5c645f02d57 --- /dev/null +++ b/arch/sh/mach-cayman/iomap.c @@ -0,0 +1,22 @@ +/* + * arch/sh64/mach-cayman/iomap.c + * + * Cayman iomap interface + * + * Copyright (C) 2004 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include +#include + +void __iomem *ioport_map(unsigned long port, unsigned int len) +{ + if (port < 0x400) + return (void __iomem *)((port << 2) | smsc_superio_virt); + + return (void __iomem *)port; +} + diff --git a/arch/sh/mach-cayman/irq.c b/arch/sh/mach-cayman/irq.c new file mode 100644 index 000000000000..aaad36d37d1f --- /dev/null +++ b/arch/sh/mach-cayman/irq.c @@ -0,0 +1,195 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * arch/sh64/kernel/irq_cayman.c + * + * SH-5 Cayman Interrupt Support + * + * This file handles the board specific parts of the Cayman interrupt system + * + * Copyright (C) 2002 Stuart Menefy + */ + +#include +#include +#include +#include +#include +#include +#include + +unsigned long epld_virt; + +#define EPLD_BASE 0x04002000 +#define EPLD_STATUS_BASE (epld_virt + 0x10) +#define EPLD_MASK_BASE (epld_virt + 0x20) + +/* Note the SMSC SuperIO chip and SMSC LAN chip interrupts are all muxed onto + the same SH-5 interrupt */ + +static irqreturn_t cayman_interrupt_smsc(int irq, void *dev_id) +{ + printk(KERN_INFO "CAYMAN: spurious SMSC interrupt\n"); + return IRQ_NONE; +} + +static irqreturn_t cayman_interrupt_pci2(int irq, void *dev_id) +{ + printk(KERN_INFO "CAYMAN: spurious PCI interrupt, IRQ %d\n", irq); + return IRQ_NONE; +} + +static struct irqaction cayman_action_smsc = { + .name = "Cayman SMSC Mux", + .handler = cayman_interrupt_smsc, + .flags = IRQF_DISABLED, +}; + +static struct irqaction cayman_action_pci2 = { + .name = "Cayman PCI2 Mux", + .handler = cayman_interrupt_pci2, + .flags = IRQF_DISABLED, +}; + +static void enable_cayman_irq(unsigned int irq) +{ + unsigned long flags; + unsigned long mask; + unsigned int reg; + unsigned char bit; + + irq -= START_EXT_IRQS; + reg = EPLD_MASK_BASE + ((irq / 8) << 2); + bit = 1<<(irq % 8); + local_irq_save(flags); + mask = ctrl_inl(reg); + mask |= bit; + ctrl_outl(mask, reg); + local_irq_restore(flags); +} + +void disable_cayman_irq(unsigned int irq) +{ + unsigned long flags; + unsigned long mask; + unsigned int reg; + unsigned char bit; + + irq -= START_EXT_IRQS; + reg = EPLD_MASK_BASE + ((irq / 8) << 2); + bit = 1<<(irq % 8); + local_irq_save(flags); + mask = ctrl_inl(reg); + mask &= ~bit; + ctrl_outl(mask, reg); + local_irq_restore(flags); +} + +static void ack_cayman_irq(unsigned int irq) +{ + disable_cayman_irq(irq); +} + +static void end_cayman_irq(unsigned int irq) +{ + if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) + enable_cayman_irq(irq); +} + +static unsigned int startup_cayman_irq(unsigned int irq) +{ + enable_cayman_irq(irq); + return 0; /* never anything pending */ +} + +static void shutdown_cayman_irq(unsigned int irq) +{ + disable_cayman_irq(irq); +} + +struct hw_interrupt_type cayman_irq_type = { + .typename = "Cayman-IRQ", + .startup = startup_cayman_irq, + .shutdown = shutdown_cayman_irq, + .enable = enable_cayman_irq, + .disable = disable_cayman_irq, + .ack = ack_cayman_irq, + .end = end_cayman_irq, +}; + +int cayman_irq_demux(int evt) +{ + int irq = intc_evt_to_irq[evt]; + + if (irq == SMSC_IRQ) { + unsigned long status; + int i; + + status = ctrl_inl(EPLD_STATUS_BASE) & + ctrl_inl(EPLD_MASK_BASE) & 0xff; + if (status == 0) { + irq = -1; + } else { + for (i=0; i<8; i++) { + if (status & (1<= NR_INTC_IRQS + 24) && (irq < NR_INTC_IRQS + 32)) { + return sprintf(p, "(PCI2 %d)", irq - (NR_INTC_IRQS + 24)); + } + + return 0; +} +#endif + +void init_cayman_irq(void) +{ + int i; + + epld_virt = onchip_remap(EPLD_BASE, 1024, "EPLD"); + if (!epld_virt) { + printk(KERN_ERR "Cayman IRQ: Unable to remap EPLD\n"); + return; + } + + for (i=0; i + * + * May be copied or modified under the terms of the GNU General Public + * License. See linux/COPYING for more information. + * + * Flash the LEDs + */ +#include + +/* +** It is supposed these functions to be used for a low level +** debugging (via Cayman LEDs), hence to be available as soon +** as possible. +** Unfortunately Cayman LEDs relies on Cayman EPLD to be mapped +** (this happen when IRQ are initialized... quite late). +** These triky dependencies should be removed. Temporary, it +** may be enough to NOP until EPLD is mapped. +*/ + +extern unsigned long epld_virt; + +#define LED_ADDR (epld_virt + 0x008) +#define HDSP2534_ADDR (epld_virt + 0x100) + +void mach_led(int position, int value) +{ + if (!epld_virt) + return; + + if (value) + ctrl_outl(0, LED_ADDR); + else + ctrl_outl(1, LED_ADDR); + +} + +void mach_alphanum(int position, unsigned char value) +{ + if (!epld_virt) + return; + + ctrl_outb(value, HDSP2534_ADDR + 0xe0 + (position << 2)); +} + +void mach_alphanum_brightness(int setting) +{ + ctrl_outb(setting & 7, HDSP2534_ADDR + 0xc0); +} diff --git a/arch/sh/mach-cayman/setup.c b/arch/sh/mach-cayman/setup.c new file mode 100644 index 000000000000..726c520d7eb9 --- /dev/null +++ b/arch/sh/mach-cayman/setup.c @@ -0,0 +1,239 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * arch/sh64/mach-cayman/setup.c + * + * SH5 Cayman support + * + * This file handles the architecture-dependent parts of initialization + * + * Copyright David J. Mckay. + * Needs major work! + * + * benedict.gaster@superh.com: 3rd May 2002 + * Added support for ramdisk, removing statically linked romfs at the same time. + * + * lethal@linux-sh.org: 15th May 2003 + * Use the generic procfs cpuinfo interface, just return a valid board name. + */ +#include +#include +#include +#include +#include + +/* + * Platform Dependent Interrupt Priorities. + */ + +/* Using defaults defined in irq.h */ +#define RES NO_PRIORITY /* Disabled */ +#define IR0 IRL0_PRIORITY /* IRLs */ +#define IR1 IRL1_PRIORITY +#define IR2 IRL2_PRIORITY +#define IR3 IRL3_PRIORITY +#define PCA INTA_PRIORITY /* PCI Ints */ +#define PCB INTB_PRIORITY +#define PCC INTC_PRIORITY +#define PCD INTD_PRIORITY +#define SER TOP_PRIORITY +#define ERR TOP_PRIORITY +#define PW0 TOP_PRIORITY +#define PW1 TOP_PRIORITY +#define PW2 TOP_PRIORITY +#define PW3 TOP_PRIORITY +#define DM0 NO_PRIORITY /* DMA Ints */ +#define DM1 NO_PRIORITY +#define DM2 NO_PRIORITY +#define DM3 NO_PRIORITY +#define DAE NO_PRIORITY +#define TU0 TIMER_PRIORITY /* TMU Ints */ +#define TU1 NO_PRIORITY +#define TU2 NO_PRIORITY +#define TI2 NO_PRIORITY +#define ATI NO_PRIORITY /* RTC Ints */ +#define PRI NO_PRIORITY +#define CUI RTC_PRIORITY +#define ERI SCIF_PRIORITY /* SCIF Ints */ +#define RXI SCIF_PRIORITY +#define BRI SCIF_PRIORITY +#define TXI SCIF_PRIORITY +#define ITI TOP_PRIORITY /* WDT Ints */ + +/* Setup for the SMSC FDC37C935 */ +#define SMSC_SUPERIO_BASE 0x04000000 +#define SMSC_CONFIG_PORT_ADDR 0x3f0 +#define SMSC_INDEX_PORT_ADDR SMSC_CONFIG_PORT_ADDR +#define SMSC_DATA_PORT_ADDR 0x3f1 + +#define SMSC_ENTER_CONFIG_KEY 0x55 +#define SMSC_EXIT_CONFIG_KEY 0xaa + +#define SMCS_LOGICAL_DEV_INDEX 0x07 +#define SMSC_DEVICE_ID_INDEX 0x20 +#define SMSC_DEVICE_REV_INDEX 0x21 +#define SMSC_ACTIVATE_INDEX 0x30 +#define SMSC_PRIMARY_BASE_INDEX 0x60 +#define SMSC_SECONDARY_BASE_INDEX 0x62 +#define SMSC_PRIMARY_INT_INDEX 0x70 +#define SMSC_SECONDARY_INT_INDEX 0x72 + +#define SMSC_IDE1_DEVICE 1 +#define SMSC_KEYBOARD_DEVICE 7 +#define SMSC_CONFIG_REGISTERS 8 + +#define SMSC_SUPERIO_READ_INDEXED(index) ({ \ + outb((index), SMSC_INDEX_PORT_ADDR); \ + inb(SMSC_DATA_PORT_ADDR); }) +#define SMSC_SUPERIO_WRITE_INDEXED(val, index) ({ \ + outb((index), SMSC_INDEX_PORT_ADDR); \ + outb((val), SMSC_DATA_PORT_ADDR); }) + +#define IDE1_PRIMARY_BASE 0x01f0 +#define IDE1_SECONDARY_BASE 0x03f6 + +unsigned long smsc_superio_virt; + +/* + * Platform dependent structures: maps and parms block. + */ +struct resource io_resources[] = { + /* To be updated with external devices */ +}; + +struct resource kram_resources[] = { + /* These must be last in the array */ + { .name = "Kernel code", .start = 0, .end = 0 }, + /* These must be last in the array */ + { .name = "Kernel data", .start = 0, .end = 0 } +}; + +struct resource xram_resources[] = { + /* To be updated with external devices */ +}; + +struct resource rom_resources[] = { + /* To be updated with external devices */ +}; + +struct sh64_platform platform_parms = { + .readonly_rootfs = 1, + .initial_root_dev = 0x0100, + .loader_type = 1, + .io_res_p = io_resources, + .io_res_count = ARRAY_SIZE(io_resources), + .kram_res_p = kram_resources, + .kram_res_count = ARRAY_SIZE(kram_resources), + .xram_res_p = xram_resources, + .xram_res_count = ARRAY_SIZE(xram_resources), + .rom_res_p = rom_resources, + .rom_res_count = ARRAY_SIZE(rom_resources), +}; + +int platform_int_priority[NR_INTC_IRQS] = { + IR0, IR1, IR2, IR3, PCA, PCB, PCC, PCD, /* IRQ 0- 7 */ + RES, RES, RES, RES, SER, ERR, PW3, PW2, /* IRQ 8-15 */ + PW1, PW0, DM0, DM1, DM2, DM3, DAE, RES, /* IRQ 16-23 */ + RES, RES, RES, RES, RES, RES, RES, RES, /* IRQ 24-31 */ + TU0, TU1, TU2, TI2, ATI, PRI, CUI, ERI, /* IRQ 32-39 */ + RXI, BRI, TXI, RES, RES, RES, RES, RES, /* IRQ 40-47 */ + RES, RES, RES, RES, RES, RES, RES, RES, /* IRQ 48-55 */ + RES, RES, RES, RES, RES, RES, RES, ITI, /* IRQ 56-63 */ +}; + +static int __init smsc_superio_setup(void) +{ + unsigned char devid, devrev; + + smsc_superio_virt = onchip_remap(SMSC_SUPERIO_BASE, 1024, "SMSC SuperIO"); + if (!smsc_superio_virt) { + panic("Unable to remap SMSC SuperIO\n"); + } + + /* Initially the chip is in run state */ + /* Put it into configuration state */ + outb(SMSC_ENTER_CONFIG_KEY, SMSC_CONFIG_PORT_ADDR); + outb(SMSC_ENTER_CONFIG_KEY, SMSC_CONFIG_PORT_ADDR); + + /* Read device ID info */ + devid = SMSC_SUPERIO_READ_INDEXED(SMSC_DEVICE_ID_INDEX); + devrev = SMSC_SUPERIO_READ_INDEXED(SMSC_DEVICE_REV_INDEX); + printk("SMSC SuperIO devid %02x rev %02x\n", devid, devrev); + + /* Select the keyboard device */ + SMSC_SUPERIO_WRITE_INDEXED(SMSC_KEYBOARD_DEVICE, SMCS_LOGICAL_DEV_INDEX); + + /* enable it */ + SMSC_SUPERIO_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX); + + /* Select the interrupts */ + /* On a PC keyboard is IRQ1, mouse is IRQ12 */ + SMSC_SUPERIO_WRITE_INDEXED(1, SMSC_PRIMARY_INT_INDEX); + SMSC_SUPERIO_WRITE_INDEXED(12, SMSC_SECONDARY_INT_INDEX); + +#ifdef CONFIG_IDE + /* + * Only IDE1 exists on the Cayman + */ + + /* Power it on */ + SMSC_SUPERIO_WRITE_INDEXED(1 << SMSC_IDE1_DEVICE, 0x22); + + SMSC_SUPERIO_WRITE_INDEXED(SMSC_IDE1_DEVICE, SMCS_LOGICAL_DEV_INDEX); + SMSC_SUPERIO_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX); + + SMSC_SUPERIO_WRITE_INDEXED(IDE1_PRIMARY_BASE >> 8, + SMSC_PRIMARY_BASE_INDEX + 0); + SMSC_SUPERIO_WRITE_INDEXED(IDE1_PRIMARY_BASE & 0xff, + SMSC_PRIMARY_BASE_INDEX + 1); + + SMSC_SUPERIO_WRITE_INDEXED(IDE1_SECONDARY_BASE >> 8, + SMSC_SECONDARY_BASE_INDEX + 0); + SMSC_SUPERIO_WRITE_INDEXED(IDE1_SECONDARY_BASE & 0xff, + SMSC_SECONDARY_BASE_INDEX + 1); + + SMSC_SUPERIO_WRITE_INDEXED(14, SMSC_PRIMARY_INT_INDEX); + + SMSC_SUPERIO_WRITE_INDEXED(SMSC_CONFIG_REGISTERS, + SMCS_LOGICAL_DEV_INDEX); + + SMSC_SUPERIO_WRITE_INDEXED(0x00, 0xc2); /* GP42 = nIDE1_OE */ + SMSC_SUPERIO_WRITE_INDEXED(0x01, 0xc5); /* GP45 = IDE1_IRQ */ + SMSC_SUPERIO_WRITE_INDEXED(0x00, 0xc6); /* GP46 = nIOROP */ + SMSC_SUPERIO_WRITE_INDEXED(0x00, 0xc7); /* GP47 = nIOWOP */ +#endif + + /* Exit the configuration state */ + outb(SMSC_EXIT_CONFIG_KEY, SMSC_CONFIG_PORT_ADDR); + + return 0; +} + +/* This is grotty, but, because kernel is always referenced on the link line + * before any devices, this is safe. + */ +__initcall(smsc_superio_setup); + +void __init platform_setup(void) +{ + /* Cayman platform leaves the decision to head.S, for now */ + platform_parms.fpu_flags = fpu_in_use; +} + +void __init platform_monitor(void) +{ + /* Nothing yet .. */ +} + +void __init platform_reserve(void) +{ + /* Nothing yet .. */ +} + +const char *get_system_type(void) +{ + return "Hitachi Cayman"; +} + diff --git a/arch/sh/mach-harp/Makefile b/arch/sh/mach-harp/Makefile new file mode 100644 index 000000000000..2f2963fa2131 --- /dev/null +++ b/arch/sh/mach-harp/Makefile @@ -0,0 +1 @@ +obj-y := setup.o diff --git a/arch/sh/mach-harp/setup.c b/arch/sh/mach-harp/setup.c new file mode 100644 index 000000000000..05011cb369bb --- /dev/null +++ b/arch/sh/mach-harp/setup.c @@ -0,0 +1,129 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * arch/sh64/mach-harp/setup.c + * + * SH-5 Simulator Platform Support + * + * This file handles the architecture-dependent parts of initialization + * + * Copyright (C) 2000, 2001 Paolo Alberelli + * + * benedict.gaster@superh.com: 3rd May 2002 + * Added support for ramdisk, removing statically linked romfs at the same time. * + * + * lethal@linux-sh.org: 15th May 2003 + * Use the generic procfs cpuinfo interface, just return a valid board name. + */ +#include +#include +#include +#include + +/* + * Platform Dependent Interrupt Priorities. + */ + +/* Using defaults defined in irq.h */ +#define RES NO_PRIORITY /* Disabled */ +#define IR0 IRL0_PRIORITY /* IRLs */ +#define IR1 IRL1_PRIORITY +#define IR2 IRL2_PRIORITY +#define IR3 IRL3_PRIORITY +#define PCA INTA_PRIORITY /* PCI Ints */ +#define PCB INTB_PRIORITY +#define PCC INTC_PRIORITY +#define PCD INTD_PRIORITY +#define SER TOP_PRIORITY +#define ERR TOP_PRIORITY +#define PW0 TOP_PRIORITY +#define PW1 TOP_PRIORITY +#define PW2 TOP_PRIORITY +#define PW3 TOP_PRIORITY +#define DM0 NO_PRIORITY /* DMA Ints */ +#define DM1 NO_PRIORITY +#define DM2 NO_PRIORITY +#define DM3 NO_PRIORITY +#define DAE NO_PRIORITY +#define TU0 TIMER_PRIORITY /* TMU Ints */ +#define TU1 NO_PRIORITY +#define TU2 NO_PRIORITY +#define TI2 NO_PRIORITY +#define ATI NO_PRIORITY /* RTC Ints */ +#define PRI NO_PRIORITY +#define CUI RTC_PRIORITY +#define ERI SCIF_PRIORITY /* SCIF Ints */ +#define RXI SCIF_PRIORITY +#define BRI SCIF_PRIORITY +#define TXI SCIF_PRIORITY +#define ITI TOP_PRIORITY /* WDT Ints */ + +/* + * Platform dependent structures: maps and parms block. + */ +struct resource io_resources[] = { + /* To be updated with external devices */ +}; + +struct resource kram_resources[] = { + /* These must be last in the array */ + { .name = "Kernel code", .start = 0, .end = 0 }, + /* These must be last in the array */ + { .name = "Kernel data", .start = 0, .end = 0 } +}; + +struct resource xram_resources[] = { + /* To be updated with external devices */ +}; + +struct resource rom_resources[] = { + /* To be updated with external devices */ +}; + +struct sh64_platform platform_parms = { + .readonly_rootfs = 1, + .initial_root_dev = 0x0100, + .loader_type = 1, + .io_res_p = io_resources, + .io_res_count = ARRAY_SIZE(io_resources), + .kram_res_p = kram_resources, + .kram_res_count = ARRAY_SIZE(kram_resources), + .xram_res_p = xram_resources, + .xram_res_count = ARRAY_SIZE(xram_resources), + .rom_res_p = rom_resources, + .rom_res_count = ARRAY_SIZE(rom_resources), +}; + +int platform_int_priority[NR_INTC_IRQS] = { + IR0, IR1, IR2, IR3, PCA, PCB, PCC, PCD, /* IRQ 0- 7 */ + RES, RES, RES, RES, SER, ERR, PW3, PW2, /* IRQ 8-15 */ + PW1, PW0, DM0, DM1, DM2, DM3, DAE, RES, /* IRQ 16-23 */ + RES, RES, RES, RES, RES, RES, RES, RES, /* IRQ 24-31 */ + TU0, TU1, TU2, TI2, ATI, PRI, CUI, ERI, /* IRQ 32-39 */ + RXI, BRI, TXI, RES, RES, RES, RES, RES, /* IRQ 40-47 */ + RES, RES, RES, RES, RES, RES, RES, RES, /* IRQ 48-55 */ + RES, RES, RES, RES, RES, RES, RES, ITI, /* IRQ 56-63 */ +}; + +void __init platform_setup(void) +{ + /* Harp platform leaves the decision to head.S, for now */ + platform_parms.fpu_flags = fpu_in_use; +} + +void __init platform_monitor(void) +{ + /* Nothing yet .. */ +} + +void __init platform_reserve(void) +{ + /* Nothing yet .. */ +} + +const char *get_system_type(void) +{ + return "ST50 Harp"; +} diff --git a/arch/sh/mach-sim/Makefile b/arch/sh/mach-sim/Makefile new file mode 100644 index 000000000000..2f2963fa2131 --- /dev/null +++ b/arch/sh/mach-sim/Makefile @@ -0,0 +1 @@ +obj-y := setup.o diff --git a/arch/sh/mach-sim/setup.c b/arch/sh/mach-sim/setup.c new file mode 100644 index 000000000000..e3386ec1ce1f --- /dev/null +++ b/arch/sh/mach-sim/setup.c @@ -0,0 +1,126 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * arch/sh64/mach-sim/setup.c + * + * ST50 Simulator Platform Support + * + * This file handles the architecture-dependent parts of initialization + * + * Copyright (C) 2000, 2001 Paolo Alberelli + * + * lethal@linux-sh.org: 15th May 2003 + * Use the generic procfs cpuinfo interface, just return a valid board name. + */ +#include +#include +#include +#include + +/* + * Platform Dependent Interrupt Priorities. + */ + +/* Using defaults defined in irq.h */ +#define RES NO_PRIORITY /* Disabled */ +#define IR0 IRL0_PRIORITY /* IRLs */ +#define IR1 IRL1_PRIORITY +#define IR2 IRL2_PRIORITY +#define IR3 IRL3_PRIORITY +#define PCA INTA_PRIORITY /* PCI Ints */ +#define PCB INTB_PRIORITY +#define PCC INTC_PRIORITY +#define PCD INTD_PRIORITY +#define SER TOP_PRIORITY +#define ERR TOP_PRIORITY +#define PW0 TOP_PRIORITY +#define PW1 TOP_PRIORITY +#define PW2 TOP_PRIORITY +#define PW3 TOP_PRIORITY +#define DM0 NO_PRIORITY /* DMA Ints */ +#define DM1 NO_PRIORITY +#define DM2 NO_PRIORITY +#define DM3 NO_PRIORITY +#define DAE NO_PRIORITY +#define TU0 TIMER_PRIORITY /* TMU Ints */ +#define TU1 NO_PRIORITY +#define TU2 NO_PRIORITY +#define TI2 NO_PRIORITY +#define ATI NO_PRIORITY /* RTC Ints */ +#define PRI NO_PRIORITY +#define CUI RTC_PRIORITY +#define ERI SCIF_PRIORITY /* SCIF Ints */ +#define RXI SCIF_PRIORITY +#define BRI SCIF_PRIORITY +#define TXI SCIF_PRIORITY +#define ITI TOP_PRIORITY /* WDT Ints */ + +/* + * Platform dependent structures: maps and parms block. + */ +struct resource io_resources[] = { + /* Nothing yet .. */ +}; + +struct resource kram_resources[] = { + /* These must be last in the array */ + { .name = "Kernel code", .start = 0, .end = 0 }, + /* These must be last in the array */ + { .name = "Kernel data", .start = 0, .end = 0 } +}; + +struct resource xram_resources[] = { + /* Nothing yet .. */ +}; + +struct resource rom_resources[] = { + /* Nothing yet .. */ +}; + +struct sh64_platform platform_parms = { + .readonly_rootfs = 1, + .initial_root_dev = 0x0100, + .loader_type = 1, + .io_res_p = io_resources, + .io_res_count = ARRAY_SIZE(io_resources), + .kram_res_p = kram_resources, + .kram_res_count = ARRAY_SIZE(kram_resources), + .xram_res_p = xram_resources, + .xram_res_count = ARRAY_SIZE(xram_resources), + .rom_res_p = rom_resources, + .rom_res_count = ARRAY_SIZE(rom_resources), +}; + +int platform_int_priority[NR_IRQS] = { + IR0, IR1, IR2, IR3, PCA, PCB, PCC, PCD, /* IRQ 0- 7 */ + RES, RES, RES, RES, SER, ERR, PW3, PW2, /* IRQ 8-15 */ + PW1, PW0, DM0, DM1, DM2, DM3, DAE, RES, /* IRQ 16-23 */ + RES, RES, RES, RES, RES, RES, RES, RES, /* IRQ 24-31 */ + TU0, TU1, TU2, TI2, ATI, PRI, CUI, ERI, /* IRQ 32-39 */ + RXI, BRI, TXI, RES, RES, RES, RES, RES, /* IRQ 40-47 */ + RES, RES, RES, RES, RES, RES, RES, RES, /* IRQ 48-55 */ + RES, RES, RES, RES, RES, RES, RES, ITI, /* IRQ 56-63 */ +}; + +void __init platform_setup(void) +{ + /* Simulator platform leaves the decision to head.S */ + platform_parms.fpu_flags = fpu_in_use; +} + +void __init platform_monitor(void) +{ + /* Nothing yet .. */ +} + +void __init platform_reserve(void) +{ + /* Nothing yet .. */ +} + +const char *get_system_type(void) +{ + return "SH-5 Simulator"; +} diff --git a/arch/sh64/mach-cayman/Makefile b/arch/sh64/mach-cayman/Makefile deleted file mode 100644 index 67a2258bf8c4..000000000000 --- a/arch/sh64/mach-cayman/Makefile +++ /dev/null @@ -1,11 +0,0 @@ -# -# Makefile for the Hitachi Cayman specific parts of the kernel -# -# Note! Dependencies are done automagically by 'make dep', which also -# removes any old dependencies. DON'T put your own dependencies here -# unless it's something special (ie not a .c file). -# - -obj-y := setup.o irq.o iomap.o -obj-$(CONFIG_HEARTBEAT) += led.o - diff --git a/arch/sh64/mach-cayman/iomap.c b/arch/sh64/mach-cayman/iomap.c deleted file mode 100644 index a5c645f02d57..000000000000 --- a/arch/sh64/mach-cayman/iomap.c +++ /dev/null @@ -1,22 +0,0 @@ -/* - * arch/sh64/mach-cayman/iomap.c - * - * Cayman iomap interface - * - * Copyright (C) 2004 Paul Mundt - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#include -#include - -void __iomem *ioport_map(unsigned long port, unsigned int len) -{ - if (port < 0x400) - return (void __iomem *)((port << 2) | smsc_superio_virt); - - return (void __iomem *)port; -} - diff --git a/arch/sh64/mach-cayman/irq.c b/arch/sh64/mach-cayman/irq.c deleted file mode 100644 index aaad36d37d1f..000000000000 --- a/arch/sh64/mach-cayman/irq.c +++ /dev/null @@ -1,195 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * arch/sh64/kernel/irq_cayman.c - * - * SH-5 Cayman Interrupt Support - * - * This file handles the board specific parts of the Cayman interrupt system - * - * Copyright (C) 2002 Stuart Menefy - */ - -#include -#include -#include -#include -#include -#include -#include - -unsigned long epld_virt; - -#define EPLD_BASE 0x04002000 -#define EPLD_STATUS_BASE (epld_virt + 0x10) -#define EPLD_MASK_BASE (epld_virt + 0x20) - -/* Note the SMSC SuperIO chip and SMSC LAN chip interrupts are all muxed onto - the same SH-5 interrupt */ - -static irqreturn_t cayman_interrupt_smsc(int irq, void *dev_id) -{ - printk(KERN_INFO "CAYMAN: spurious SMSC interrupt\n"); - return IRQ_NONE; -} - -static irqreturn_t cayman_interrupt_pci2(int irq, void *dev_id) -{ - printk(KERN_INFO "CAYMAN: spurious PCI interrupt, IRQ %d\n", irq); - return IRQ_NONE; -} - -static struct irqaction cayman_action_smsc = { - .name = "Cayman SMSC Mux", - .handler = cayman_interrupt_smsc, - .flags = IRQF_DISABLED, -}; - -static struct irqaction cayman_action_pci2 = { - .name = "Cayman PCI2 Mux", - .handler = cayman_interrupt_pci2, - .flags = IRQF_DISABLED, -}; - -static void enable_cayman_irq(unsigned int irq) -{ - unsigned long flags; - unsigned long mask; - unsigned int reg; - unsigned char bit; - - irq -= START_EXT_IRQS; - reg = EPLD_MASK_BASE + ((irq / 8) << 2); - bit = 1<<(irq % 8); - local_irq_save(flags); - mask = ctrl_inl(reg); - mask |= bit; - ctrl_outl(mask, reg); - local_irq_restore(flags); -} - -void disable_cayman_irq(unsigned int irq) -{ - unsigned long flags; - unsigned long mask; - unsigned int reg; - unsigned char bit; - - irq -= START_EXT_IRQS; - reg = EPLD_MASK_BASE + ((irq / 8) << 2); - bit = 1<<(irq % 8); - local_irq_save(flags); - mask = ctrl_inl(reg); - mask &= ~bit; - ctrl_outl(mask, reg); - local_irq_restore(flags); -} - -static void ack_cayman_irq(unsigned int irq) -{ - disable_cayman_irq(irq); -} - -static void end_cayman_irq(unsigned int irq) -{ - if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) - enable_cayman_irq(irq); -} - -static unsigned int startup_cayman_irq(unsigned int irq) -{ - enable_cayman_irq(irq); - return 0; /* never anything pending */ -} - -static void shutdown_cayman_irq(unsigned int irq) -{ - disable_cayman_irq(irq); -} - -struct hw_interrupt_type cayman_irq_type = { - .typename = "Cayman-IRQ", - .startup = startup_cayman_irq, - .shutdown = shutdown_cayman_irq, - .enable = enable_cayman_irq, - .disable = disable_cayman_irq, - .ack = ack_cayman_irq, - .end = end_cayman_irq, -}; - -int cayman_irq_demux(int evt) -{ - int irq = intc_evt_to_irq[evt]; - - if (irq == SMSC_IRQ) { - unsigned long status; - int i; - - status = ctrl_inl(EPLD_STATUS_BASE) & - ctrl_inl(EPLD_MASK_BASE) & 0xff; - if (status == 0) { - irq = -1; - } else { - for (i=0; i<8; i++) { - if (status & (1<= NR_INTC_IRQS + 24) && (irq < NR_INTC_IRQS + 32)) { - return sprintf(p, "(PCI2 %d)", irq - (NR_INTC_IRQS + 24)); - } - - return 0; -} -#endif - -void init_cayman_irq(void) -{ - int i; - - epld_virt = onchip_remap(EPLD_BASE, 1024, "EPLD"); - if (!epld_virt) { - printk(KERN_ERR "Cayman IRQ: Unable to remap EPLD\n"); - return; - } - - for (i=0; i - * - * May be copied or modified under the terms of the GNU General Public - * License. See linux/COPYING for more information. - * - * Flash the LEDs - */ -#include - -/* -** It is supposed these functions to be used for a low level -** debugging (via Cayman LEDs), hence to be available as soon -** as possible. -** Unfortunately Cayman LEDs relies on Cayman EPLD to be mapped -** (this happen when IRQ are initialized... quite late). -** These triky dependencies should be removed. Temporary, it -** may be enough to NOP until EPLD is mapped. -*/ - -extern unsigned long epld_virt; - -#define LED_ADDR (epld_virt + 0x008) -#define HDSP2534_ADDR (epld_virt + 0x100) - -void mach_led(int position, int value) -{ - if (!epld_virt) - return; - - if (value) - ctrl_outl(0, LED_ADDR); - else - ctrl_outl(1, LED_ADDR); - -} - -void mach_alphanum(int position, unsigned char value) -{ - if (!epld_virt) - return; - - ctrl_outb(value, HDSP2534_ADDR + 0xe0 + (position << 2)); -} - -void mach_alphanum_brightness(int setting) -{ - ctrl_outb(setting & 7, HDSP2534_ADDR + 0xc0); -} diff --git a/arch/sh64/mach-cayman/setup.c b/arch/sh64/mach-cayman/setup.c deleted file mode 100644 index 726c520d7eb9..000000000000 --- a/arch/sh64/mach-cayman/setup.c +++ /dev/null @@ -1,239 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * arch/sh64/mach-cayman/setup.c - * - * SH5 Cayman support - * - * This file handles the architecture-dependent parts of initialization - * - * Copyright David J. Mckay. - * Needs major work! - * - * benedict.gaster@superh.com: 3rd May 2002 - * Added support for ramdisk, removing statically linked romfs at the same time. - * - * lethal@linux-sh.org: 15th May 2003 - * Use the generic procfs cpuinfo interface, just return a valid board name. - */ -#include -#include -#include -#include -#include - -/* - * Platform Dependent Interrupt Priorities. - */ - -/* Using defaults defined in irq.h */ -#define RES NO_PRIORITY /* Disabled */ -#define IR0 IRL0_PRIORITY /* IRLs */ -#define IR1 IRL1_PRIORITY -#define IR2 IRL2_PRIORITY -#define IR3 IRL3_PRIORITY -#define PCA INTA_PRIORITY /* PCI Ints */ -#define PCB INTB_PRIORITY -#define PCC INTC_PRIORITY -#define PCD INTD_PRIORITY -#define SER TOP_PRIORITY -#define ERR TOP_PRIORITY -#define PW0 TOP_PRIORITY -#define PW1 TOP_PRIORITY -#define PW2 TOP_PRIORITY -#define PW3 TOP_PRIORITY -#define DM0 NO_PRIORITY /* DMA Ints */ -#define DM1 NO_PRIORITY -#define DM2 NO_PRIORITY -#define DM3 NO_PRIORITY -#define DAE NO_PRIORITY -#define TU0 TIMER_PRIORITY /* TMU Ints */ -#define TU1 NO_PRIORITY -#define TU2 NO_PRIORITY -#define TI2 NO_PRIORITY -#define ATI NO_PRIORITY /* RTC Ints */ -#define PRI NO_PRIORITY -#define CUI RTC_PRIORITY -#define ERI SCIF_PRIORITY /* SCIF Ints */ -#define RXI SCIF_PRIORITY -#define BRI SCIF_PRIORITY -#define TXI SCIF_PRIORITY -#define ITI TOP_PRIORITY /* WDT Ints */ - -/* Setup for the SMSC FDC37C935 */ -#define SMSC_SUPERIO_BASE 0x04000000 -#define SMSC_CONFIG_PORT_ADDR 0x3f0 -#define SMSC_INDEX_PORT_ADDR SMSC_CONFIG_PORT_ADDR -#define SMSC_DATA_PORT_ADDR 0x3f1 - -#define SMSC_ENTER_CONFIG_KEY 0x55 -#define SMSC_EXIT_CONFIG_KEY 0xaa - -#define SMCS_LOGICAL_DEV_INDEX 0x07 -#define SMSC_DEVICE_ID_INDEX 0x20 -#define SMSC_DEVICE_REV_INDEX 0x21 -#define SMSC_ACTIVATE_INDEX 0x30 -#define SMSC_PRIMARY_BASE_INDEX 0x60 -#define SMSC_SECONDARY_BASE_INDEX 0x62 -#define SMSC_PRIMARY_INT_INDEX 0x70 -#define SMSC_SECONDARY_INT_INDEX 0x72 - -#define SMSC_IDE1_DEVICE 1 -#define SMSC_KEYBOARD_DEVICE 7 -#define SMSC_CONFIG_REGISTERS 8 - -#define SMSC_SUPERIO_READ_INDEXED(index) ({ \ - outb((index), SMSC_INDEX_PORT_ADDR); \ - inb(SMSC_DATA_PORT_ADDR); }) -#define SMSC_SUPERIO_WRITE_INDEXED(val, index) ({ \ - outb((index), SMSC_INDEX_PORT_ADDR); \ - outb((val), SMSC_DATA_PORT_ADDR); }) - -#define IDE1_PRIMARY_BASE 0x01f0 -#define IDE1_SECONDARY_BASE 0x03f6 - -unsigned long smsc_superio_virt; - -/* - * Platform dependent structures: maps and parms block. - */ -struct resource io_resources[] = { - /* To be updated with external devices */ -}; - -struct resource kram_resources[] = { - /* These must be last in the array */ - { .name = "Kernel code", .start = 0, .end = 0 }, - /* These must be last in the array */ - { .name = "Kernel data", .start = 0, .end = 0 } -}; - -struct resource xram_resources[] = { - /* To be updated with external devices */ -}; - -struct resource rom_resources[] = { - /* To be updated with external devices */ -}; - -struct sh64_platform platform_parms = { - .readonly_rootfs = 1, - .initial_root_dev = 0x0100, - .loader_type = 1, - .io_res_p = io_resources, - .io_res_count = ARRAY_SIZE(io_resources), - .kram_res_p = kram_resources, - .kram_res_count = ARRAY_SIZE(kram_resources), - .xram_res_p = xram_resources, - .xram_res_count = ARRAY_SIZE(xram_resources), - .rom_res_p = rom_resources, - .rom_res_count = ARRAY_SIZE(rom_resources), -}; - -int platform_int_priority[NR_INTC_IRQS] = { - IR0, IR1, IR2, IR3, PCA, PCB, PCC, PCD, /* IRQ 0- 7 */ - RES, RES, RES, RES, SER, ERR, PW3, PW2, /* IRQ 8-15 */ - PW1, PW0, DM0, DM1, DM2, DM3, DAE, RES, /* IRQ 16-23 */ - RES, RES, RES, RES, RES, RES, RES, RES, /* IRQ 24-31 */ - TU0, TU1, TU2, TI2, ATI, PRI, CUI, ERI, /* IRQ 32-39 */ - RXI, BRI, TXI, RES, RES, RES, RES, RES, /* IRQ 40-47 */ - RES, RES, RES, RES, RES, RES, RES, RES, /* IRQ 48-55 */ - RES, RES, RES, RES, RES, RES, RES, ITI, /* IRQ 56-63 */ -}; - -static int __init smsc_superio_setup(void) -{ - unsigned char devid, devrev; - - smsc_superio_virt = onchip_remap(SMSC_SUPERIO_BASE, 1024, "SMSC SuperIO"); - if (!smsc_superio_virt) { - panic("Unable to remap SMSC SuperIO\n"); - } - - /* Initially the chip is in run state */ - /* Put it into configuration state */ - outb(SMSC_ENTER_CONFIG_KEY, SMSC_CONFIG_PORT_ADDR); - outb(SMSC_ENTER_CONFIG_KEY, SMSC_CONFIG_PORT_ADDR); - - /* Read device ID info */ - devid = SMSC_SUPERIO_READ_INDEXED(SMSC_DEVICE_ID_INDEX); - devrev = SMSC_SUPERIO_READ_INDEXED(SMSC_DEVICE_REV_INDEX); - printk("SMSC SuperIO devid %02x rev %02x\n", devid, devrev); - - /* Select the keyboard device */ - SMSC_SUPERIO_WRITE_INDEXED(SMSC_KEYBOARD_DEVICE, SMCS_LOGICAL_DEV_INDEX); - - /* enable it */ - SMSC_SUPERIO_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX); - - /* Select the interrupts */ - /* On a PC keyboard is IRQ1, mouse is IRQ12 */ - SMSC_SUPERIO_WRITE_INDEXED(1, SMSC_PRIMARY_INT_INDEX); - SMSC_SUPERIO_WRITE_INDEXED(12, SMSC_SECONDARY_INT_INDEX); - -#ifdef CONFIG_IDE - /* - * Only IDE1 exists on the Cayman - */ - - /* Power it on */ - SMSC_SUPERIO_WRITE_INDEXED(1 << SMSC_IDE1_DEVICE, 0x22); - - SMSC_SUPERIO_WRITE_INDEXED(SMSC_IDE1_DEVICE, SMCS_LOGICAL_DEV_INDEX); - SMSC_SUPERIO_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX); - - SMSC_SUPERIO_WRITE_INDEXED(IDE1_PRIMARY_BASE >> 8, - SMSC_PRIMARY_BASE_INDEX + 0); - SMSC_SUPERIO_WRITE_INDEXED(IDE1_PRIMARY_BASE & 0xff, - SMSC_PRIMARY_BASE_INDEX + 1); - - SMSC_SUPERIO_WRITE_INDEXED(IDE1_SECONDARY_BASE >> 8, - SMSC_SECONDARY_BASE_INDEX + 0); - SMSC_SUPERIO_WRITE_INDEXED(IDE1_SECONDARY_BASE & 0xff, - SMSC_SECONDARY_BASE_INDEX + 1); - - SMSC_SUPERIO_WRITE_INDEXED(14, SMSC_PRIMARY_INT_INDEX); - - SMSC_SUPERIO_WRITE_INDEXED(SMSC_CONFIG_REGISTERS, - SMCS_LOGICAL_DEV_INDEX); - - SMSC_SUPERIO_WRITE_INDEXED(0x00, 0xc2); /* GP42 = nIDE1_OE */ - SMSC_SUPERIO_WRITE_INDEXED(0x01, 0xc5); /* GP45 = IDE1_IRQ */ - SMSC_SUPERIO_WRITE_INDEXED(0x00, 0xc6); /* GP46 = nIOROP */ - SMSC_SUPERIO_WRITE_INDEXED(0x00, 0xc7); /* GP47 = nIOWOP */ -#endif - - /* Exit the configuration state */ - outb(SMSC_EXIT_CONFIG_KEY, SMSC_CONFIG_PORT_ADDR); - - return 0; -} - -/* This is grotty, but, because kernel is always referenced on the link line - * before any devices, this is safe. - */ -__initcall(smsc_superio_setup); - -void __init platform_setup(void) -{ - /* Cayman platform leaves the decision to head.S, for now */ - platform_parms.fpu_flags = fpu_in_use; -} - -void __init platform_monitor(void) -{ - /* Nothing yet .. */ -} - -void __init platform_reserve(void) -{ - /* Nothing yet .. */ -} - -const char *get_system_type(void) -{ - return "Hitachi Cayman"; -} - diff --git a/arch/sh64/mach-harp/Makefile b/arch/sh64/mach-harp/Makefile deleted file mode 100644 index 2f2963fa2131..000000000000 --- a/arch/sh64/mach-harp/Makefile +++ /dev/null @@ -1 +0,0 @@ -obj-y := setup.o diff --git a/arch/sh64/mach-harp/setup.c b/arch/sh64/mach-harp/setup.c deleted file mode 100644 index 05011cb369bb..000000000000 --- a/arch/sh64/mach-harp/setup.c +++ /dev/null @@ -1,129 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * arch/sh64/mach-harp/setup.c - * - * SH-5 Simulator Platform Support - * - * This file handles the architecture-dependent parts of initialization - * - * Copyright (C) 2000, 2001 Paolo Alberelli - * - * benedict.gaster@superh.com: 3rd May 2002 - * Added support for ramdisk, removing statically linked romfs at the same time. * - * - * lethal@linux-sh.org: 15th May 2003 - * Use the generic procfs cpuinfo interface, just return a valid board name. - */ -#include -#include -#include -#include - -/* - * Platform Dependent Interrupt Priorities. - */ - -/* Using defaults defined in irq.h */ -#define RES NO_PRIORITY /* Disabled */ -#define IR0 IRL0_PRIORITY /* IRLs */ -#define IR1 IRL1_PRIORITY -#define IR2 IRL2_PRIORITY -#define IR3 IRL3_PRIORITY -#define PCA INTA_PRIORITY /* PCI Ints */ -#define PCB INTB_PRIORITY -#define PCC INTC_PRIORITY -#define PCD INTD_PRIORITY -#define SER TOP_PRIORITY -#define ERR TOP_PRIORITY -#define PW0 TOP_PRIORITY -#define PW1 TOP_PRIORITY -#define PW2 TOP_PRIORITY -#define PW3 TOP_PRIORITY -#define DM0 NO_PRIORITY /* DMA Ints */ -#define DM1 NO_PRIORITY -#define DM2 NO_PRIORITY -#define DM3 NO_PRIORITY -#define DAE NO_PRIORITY -#define TU0 TIMER_PRIORITY /* TMU Ints */ -#define TU1 NO_PRIORITY -#define TU2 NO_PRIORITY -#define TI2 NO_PRIORITY -#define ATI NO_PRIORITY /* RTC Ints */ -#define PRI NO_PRIORITY -#define CUI RTC_PRIORITY -#define ERI SCIF_PRIORITY /* SCIF Ints */ -#define RXI SCIF_PRIORITY -#define BRI SCIF_PRIORITY -#define TXI SCIF_PRIORITY -#define ITI TOP_PRIORITY /* WDT Ints */ - -/* - * Platform dependent structures: maps and parms block. - */ -struct resource io_resources[] = { - /* To be updated with external devices */ -}; - -struct resource kram_resources[] = { - /* These must be last in the array */ - { .name = "Kernel code", .start = 0, .end = 0 }, - /* These must be last in the array */ - { .name = "Kernel data", .start = 0, .end = 0 } -}; - -struct resource xram_resources[] = { - /* To be updated with external devices */ -}; - -struct resource rom_resources[] = { - /* To be updated with external devices */ -}; - -struct sh64_platform platform_parms = { - .readonly_rootfs = 1, - .initial_root_dev = 0x0100, - .loader_type = 1, - .io_res_p = io_resources, - .io_res_count = ARRAY_SIZE(io_resources), - .kram_res_p = kram_resources, - .kram_res_count = ARRAY_SIZE(kram_resources), - .xram_res_p = xram_resources, - .xram_res_count = ARRAY_SIZE(xram_resources), - .rom_res_p = rom_resources, - .rom_res_count = ARRAY_SIZE(rom_resources), -}; - -int platform_int_priority[NR_INTC_IRQS] = { - IR0, IR1, IR2, IR3, PCA, PCB, PCC, PCD, /* IRQ 0- 7 */ - RES, RES, RES, RES, SER, ERR, PW3, PW2, /* IRQ 8-15 */ - PW1, PW0, DM0, DM1, DM2, DM3, DAE, RES, /* IRQ 16-23 */ - RES, RES, RES, RES, RES, RES, RES, RES, /* IRQ 24-31 */ - TU0, TU1, TU2, TI2, ATI, PRI, CUI, ERI, /* IRQ 32-39 */ - RXI, BRI, TXI, RES, RES, RES, RES, RES, /* IRQ 40-47 */ - RES, RES, RES, RES, RES, RES, RES, RES, /* IRQ 48-55 */ - RES, RES, RES, RES, RES, RES, RES, ITI, /* IRQ 56-63 */ -}; - -void __init platform_setup(void) -{ - /* Harp platform leaves the decision to head.S, for now */ - platform_parms.fpu_flags = fpu_in_use; -} - -void __init platform_monitor(void) -{ - /* Nothing yet .. */ -} - -void __init platform_reserve(void) -{ - /* Nothing yet .. */ -} - -const char *get_system_type(void) -{ - return "ST50 Harp"; -} diff --git a/arch/sh64/mach-sim/Makefile b/arch/sh64/mach-sim/Makefile deleted file mode 100644 index 2f2963fa2131..000000000000 --- a/arch/sh64/mach-sim/Makefile +++ /dev/null @@ -1 +0,0 @@ -obj-y := setup.o diff --git a/arch/sh64/mach-sim/setup.c b/arch/sh64/mach-sim/setup.c deleted file mode 100644 index e3386ec1ce1f..000000000000 --- a/arch/sh64/mach-sim/setup.c +++ /dev/null @@ -1,126 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * arch/sh64/mach-sim/setup.c - * - * ST50 Simulator Platform Support - * - * This file handles the architecture-dependent parts of initialization - * - * Copyright (C) 2000, 2001 Paolo Alberelli - * - * lethal@linux-sh.org: 15th May 2003 - * Use the generic procfs cpuinfo interface, just return a valid board name. - */ -#include -#include -#include -#include - -/* - * Platform Dependent Interrupt Priorities. - */ - -/* Using defaults defined in irq.h */ -#define RES NO_PRIORITY /* Disabled */ -#define IR0 IRL0_PRIORITY /* IRLs */ -#define IR1 IRL1_PRIORITY -#define IR2 IRL2_PRIORITY -#define IR3 IRL3_PRIORITY -#define PCA INTA_PRIORITY /* PCI Ints */ -#define PCB INTB_PRIORITY -#define PCC INTC_PRIORITY -#define PCD INTD_PRIORITY -#define SER TOP_PRIORITY -#define ERR TOP_PRIORITY -#define PW0 TOP_PRIORITY -#define PW1 TOP_PRIORITY -#define PW2 TOP_PRIORITY -#define PW3 TOP_PRIORITY -#define DM0 NO_PRIORITY /* DMA Ints */ -#define DM1 NO_PRIORITY -#define DM2 NO_PRIORITY -#define DM3 NO_PRIORITY -#define DAE NO_PRIORITY -#define TU0 TIMER_PRIORITY /* TMU Ints */ -#define TU1 NO_PRIORITY -#define TU2 NO_PRIORITY -#define TI2 NO_PRIORITY -#define ATI NO_PRIORITY /* RTC Ints */ -#define PRI NO_PRIORITY -#define CUI RTC_PRIORITY -#define ERI SCIF_PRIORITY /* SCIF Ints */ -#define RXI SCIF_PRIORITY -#define BRI SCIF_PRIORITY -#define TXI SCIF_PRIORITY -#define ITI TOP_PRIORITY /* WDT Ints */ - -/* - * Platform dependent structures: maps and parms block. - */ -struct resource io_resources[] = { - /* Nothing yet .. */ -}; - -struct resource kram_resources[] = { - /* These must be last in the array */ - { .name = "Kernel code", .start = 0, .end = 0 }, - /* These must be last in the array */ - { .name = "Kernel data", .start = 0, .end = 0 } -}; - -struct resource xram_resources[] = { - /* Nothing yet .. */ -}; - -struct resource rom_resources[] = { - /* Nothing yet .. */ -}; - -struct sh64_platform platform_parms = { - .readonly_rootfs = 1, - .initial_root_dev = 0x0100, - .loader_type = 1, - .io_res_p = io_resources, - .io_res_count = ARRAY_SIZE(io_resources), - .kram_res_p = kram_resources, - .kram_res_count = ARRAY_SIZE(kram_resources), - .xram_res_p = xram_resources, - .xram_res_count = ARRAY_SIZE(xram_resources), - .rom_res_p = rom_resources, - .rom_res_count = ARRAY_SIZE(rom_resources), -}; - -int platform_int_priority[NR_IRQS] = { - IR0, IR1, IR2, IR3, PCA, PCB, PCC, PCD, /* IRQ 0- 7 */ - RES, RES, RES, RES, SER, ERR, PW3, PW2, /* IRQ 8-15 */ - PW1, PW0, DM0, DM1, DM2, DM3, DAE, RES, /* IRQ 16-23 */ - RES, RES, RES, RES, RES, RES, RES, RES, /* IRQ 24-31 */ - TU0, TU1, TU2, TI2, ATI, PRI, CUI, ERI, /* IRQ 32-39 */ - RXI, BRI, TXI, RES, RES, RES, RES, RES, /* IRQ 40-47 */ - RES, RES, RES, RES, RES, RES, RES, RES, /* IRQ 48-55 */ - RES, RES, RES, RES, RES, RES, RES, ITI, /* IRQ 56-63 */ -}; - -void __init platform_setup(void) -{ - /* Simulator platform leaves the decision to head.S */ - platform_parms.fpu_flags = fpu_in_use; -} - -void __init platform_monitor(void) -{ - /* Nothing yet .. */ -} - -void __init platform_reserve(void) -{ - /* Nothing yet .. */ -} - -const char *get_system_type(void) -{ - return "SH-5 Simulator"; -} -- cgit v1.2.3