From 2d1c645cc50b8f5a718b24bad9eb3931e7105d12 Mon Sep 17 00:00:00 2001 From: Marc Gauthier Date: Sat, 5 Jan 2013 04:57:17 +0400 Subject: xtensa: dispatch medium-priority interrupts Add support for dispatching medium-priority interrupts, that is, interrupts of priority levels 2 to EXCM_LEVEL. IRQ handling may be preempted by higher priority IRQ. Signed-off-by: Marc Gauthier Signed-off-by: Max Filippov Signed-off-by: Chris Zankel --- arch/xtensa/kernel/head.S | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) (limited to 'arch/xtensa/kernel/head.S') diff --git a/arch/xtensa/kernel/head.S b/arch/xtensa/kernel/head.S index 91d9095284de..df88f98737f4 100644 --- a/arch/xtensa/kernel/head.S +++ b/arch/xtensa/kernel/head.S @@ -7,7 +7,7 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (C) 2001 - 2005 Tensilica Inc. + * Copyright (C) 2001 - 2008 Tensilica Inc. * * Chris Zankel * Marc Gauthier @@ -128,14 +128,14 @@ ENTRY(_startup) wsr a0, cpenable #endif - /* Set PS.INTLEVEL=1, PS.WOE=0, kernel stack, PS.EXCM=0 + /* Set PS.INTLEVEL=LOCKLEVEL, PS.WOE=0, kernel stack, PS.EXCM=0 * * Note: PS.EXCM must be cleared before using any loop * instructions; otherwise, they are silently disabled, and * at most one iteration of the loop is executed. */ - movi a1, 1 + movi a1, LOCKLEVEL wsr a1, ps rsync @@ -211,7 +211,8 @@ ENTRY(_startup) movi a1, init_thread_union addi a1, a1, KERNEL_STACK_SIZE - movi a2, 0x00040001 # WOE=1, INTLEVEL=1, UM=0 + movi a2, (1 << PS_WOE_BIT) | LOCKLEVEL + # WOE=1, INTLEVEL=LOCKLEVEL, UM=0 wsr a2, ps # (enable reg-windows; progmode stack) rsync -- cgit v1.2.3