From 442a7c40b1dac78588abfe8ed4c97e4bb8b36e73 Mon Sep 17 00:00:00 2001 From: "David S. Miller" Date: Wed, 22 Aug 2012 20:47:36 -0700 Subject: sparc64: Add CRC32C driver making use of the new crc32c opcode. Signed-off-by: David S. Miller --- arch/sparc/crypto/crc32c_asm.S | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) create mode 100644 arch/sparc/crypto/crc32c_asm.S (limited to 'arch/sparc/crypto/crc32c_asm.S') diff --git a/arch/sparc/crypto/crc32c_asm.S b/arch/sparc/crypto/crc32c_asm.S new file mode 100644 index 000000000000..cb479ec72433 --- /dev/null +++ b/arch/sparc/crypto/crc32c_asm.S @@ -0,0 +1,29 @@ +#include +#include +#include + +#define F3F(x,y,z) (((x)<<30)|((y)<<19)|((z)<<5)) + +#define FPD_ENCODE(x) (((x) >> 5) | ((x) & ~(0x20))) + +#define RS1(x) (FPD_ENCODE(x) << 14) +#define RS2(x) (FPD_ENCODE(x) << 0) +#define RD(x) (FPD_ENCODE(x) << 25) + +#define CRC32C(a,b,c) \ + .word (F3F(2,0x36,0x147)|RS1(a)|RS2(b)|RD(c)); + +ENTRY(crc32c_sparc64) + /* %o0=crc32p, %o1=data_ptr, %o2=len */ + VISEntryHalf + lda [%o0] ASI_PL, %f1 +1: ldd [%o1], %f2 + CRC32C(0,2,0) + subcc %o2, 8, %o2 + bne,pt %icc, 1b + add %o1, 0x8, %o1 + sta %f1, [%o0] ASI_PL + VISExitHalf +2: retl + nop +ENDPROC(crc32c_sparc64) -- cgit v1.2.3 From 7cff82f5f42a938a1b633e121a41d29c81de18bb Mon Sep 17 00:00:00 2001 From: "David S. Miller" Date: Fri, 31 Aug 2012 12:11:51 -0700 Subject: sparc64: Avoid code duplication in crypto assembler. Put the opcode macros in a common header Signed-off-by: David S. Miller --- arch/sparc/crypto/crc32c_asm.S | 11 +---------- 1 file changed, 1 insertion(+), 10 deletions(-) (limited to 'arch/sparc/crypto/crc32c_asm.S') diff --git a/arch/sparc/crypto/crc32c_asm.S b/arch/sparc/crypto/crc32c_asm.S index cb479ec72433..2b1976e765b5 100644 --- a/arch/sparc/crypto/crc32c_asm.S +++ b/arch/sparc/crypto/crc32c_asm.S @@ -2,16 +2,7 @@ #include #include -#define F3F(x,y,z) (((x)<<30)|((y)<<19)|((z)<<5)) - -#define FPD_ENCODE(x) (((x) >> 5) | ((x) & ~(0x20))) - -#define RS1(x) (FPD_ENCODE(x) << 14) -#define RS2(x) (FPD_ENCODE(x) << 0) -#define RD(x) (FPD_ENCODE(x) << 25) - -#define CRC32C(a,b,c) \ - .word (F3F(2,0x36,0x147)|RS1(a)|RS2(b)|RD(c)); +#include "opcodes.h" ENTRY(crc32c_sparc64) /* %o0=crc32p, %o1=data_ptr, %o2=len */ -- cgit v1.2.3