From 4a55530f38e4eeee3afb06093e81309138fe8360 Mon Sep 17 00:00:00 2001 From: Yoshihiro Shimoda Date: Mon, 7 Mar 2011 21:59:26 +0000 Subject: net: sh_eth: modify the definitions of register The previous code cannot handle the ETHER and GETHER both as same time because the definitions of register was hardcoded. Signed-off-by: Yoshihiro Shimoda Signed-off-by: David S. Miller --- arch/sh/include/asm/sh_eth.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'arch/sh/include/asm') diff --git a/arch/sh/include/asm/sh_eth.h b/arch/sh/include/asm/sh_eth.h index f739061e2ee4..155769601065 100644 --- a/arch/sh/include/asm/sh_eth.h +++ b/arch/sh/include/asm/sh_eth.h @@ -2,10 +2,16 @@ #define __ASM_SH_ETH_H__ enum {EDMAC_LITTLE_ENDIAN, EDMAC_BIG_ENDIAN}; +enum { + SH_ETH_REG_GIGABIT, + SH_ETH_REG_FAST_SH4, + SH_ETH_REG_FAST_SH3_SH2 +}; struct sh_eth_plat_data { int phy; int edmac_endian; + int register_type; unsigned char mac_addr[6]; unsigned no_ether_link:1; -- cgit v1.2.3 From e47c90523484518aac30498150e427d824ace705 Mon Sep 17 00:00:00 2001 From: Yoshihiro Shimoda Date: Mon, 7 Mar 2011 21:59:45 +0000 Subject: net: sh_eth: modify the PHY_INTERFACE_MODE The previous code had hardcoded the PHY_INTERFACE_MODE_MII of phy_connect. So some Gigabit PHYs will not behave correctly. The patch adds the phy_interface in sh_eth_plat_data, so we can select the phy interface. Signed-off-by: Yoshihiro Shimoda Signed-off-by: David S. Miller --- arch/sh/include/asm/sh_eth.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'arch/sh/include/asm') diff --git a/arch/sh/include/asm/sh_eth.h b/arch/sh/include/asm/sh_eth.h index 155769601065..e86c880b7e4c 100644 --- a/arch/sh/include/asm/sh_eth.h +++ b/arch/sh/include/asm/sh_eth.h @@ -1,6 +1,8 @@ #ifndef __ASM_SH_ETH_H__ #define __ASM_SH_ETH_H__ +#include + enum {EDMAC_LITTLE_ENDIAN, EDMAC_BIG_ENDIAN}; enum { SH_ETH_REG_GIGABIT, @@ -12,6 +14,7 @@ struct sh_eth_plat_data { int phy; int edmac_endian; int register_type; + phy_interface_t phy_interface; unsigned char mac_addr[6]; unsigned no_ether_link:1; -- cgit v1.2.3 From b3017e6a03d261778ad9450b5510460c4d462203 Mon Sep 17 00:00:00 2001 From: Yoshihiro Shimoda Date: Mon, 7 Mar 2011 21:59:55 +0000 Subject: net: sh_eth: add set_mdio_gate in bb_info The SH7757's ETHER and GETHER use common MDIO pin. The MDIO pin is selected by specific register. So this patch adds new interface in bb_info, and when the sh_eth driver use the mdio, the register can be changed by the function. Signed-off-by: Yoshihiro Shimoda Signed-off-by: David S. Miller --- arch/sh/include/asm/sh_eth.h | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/sh/include/asm') diff --git a/arch/sh/include/asm/sh_eth.h b/arch/sh/include/asm/sh_eth.h index e86c880b7e4c..0f325da0f923 100644 --- a/arch/sh/include/asm/sh_eth.h +++ b/arch/sh/include/asm/sh_eth.h @@ -15,6 +15,7 @@ struct sh_eth_plat_data { int edmac_endian; int register_type; phy_interface_t phy_interface; + void (*set_mdio_gate)(unsigned long addr); unsigned char mac_addr[6]; unsigned no_ether_link:1; -- cgit v1.2.3