From 944916858a430a0627e483657d4cfa2cd2dfb4f7 Mon Sep 17 00:00:00 2001 From: Benjamin Herrenschmidt Date: Tue, 2 Jun 2009 21:17:45 +0000 Subject: powerpc: Shield code specific to 64-bit server processors This is a random collection of added ifdef's around portions of code that only mak sense on server processors. Using either CONFIG_PPC_STD_MMU_64 or CONFIG_PPC_BOOK3S as seems appropriate. This is meant to make the future merging of Book3E 64-bit support easier. Signed-off-by: Benjamin Herrenschmidt --- arch/powerpc/kernel/pci_64.c | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'arch/powerpc/kernel/pci_64.c') diff --git a/arch/powerpc/kernel/pci_64.c b/arch/powerpc/kernel/pci_64.c index dd6c7a3bf72c..461c91625a80 100644 --- a/arch/powerpc/kernel/pci_64.c +++ b/arch/powerpc/kernel/pci_64.c @@ -420,6 +420,9 @@ int pcibios_unmap_io_space(struct pci_bus *bus) * so flushing the hash table is the only sane way to make sure * that no hash entries are covering that removed bridge area * while still allowing other busses overlapping those pages + * + * Note: If we ever support P2P hotplug on Book3E, we'll have + * to do an appropriate TLB flush here too */ if (bus->self) { struct resource *res = bus->resource[0]; @@ -427,8 +430,10 @@ int pcibios_unmap_io_space(struct pci_bus *bus) pr_debug("IO unmapping for PCI-PCI bridge %s\n", pci_name(bus->self)); +#ifdef CONFIG_PPC_STD_MMU_64 __flush_hash_table_range(&init_mm, res->start + _IO_BASE, res->end + _IO_BASE + 1); +#endif return 0; } -- cgit v1.2.3