From 222b27713d7f7e189cca30ccdcee8e1f953d2c9f Mon Sep 17 00:00:00 2001 From: Sergio Paracuellos Date: Mon, 14 Jun 2021 12:06:15 +0200 Subject: MIPS: ralink: Define PCI_IOBASE PCI_IOBASE is used to create VM maps for PCI I/O ports, it is required by generic PCI drivers to make memory mapped I/O range work. Hence define it for ralink architectures to be able to avoid parsing manually IO ranges in PCI generic driver code. Function 'plat_mem_setup' for ralink is using 'set_io_port_base' call using '0xa0000000' as address, so use the same address in the definition to align things. Acked-by: Thomas Bogendoerfer Signed-off-by: Sergio Paracuellos Link: https://lore.kernel.org/r/20210614100617.28753-2-sergio.paracuellos@gmail.com Signed-off-by: Greg Kroah-Hartman --- arch/mips/include/asm/mach-ralink/spaces.h | 10 ++++++++++ 1 file changed, 10 insertions(+) create mode 100644 arch/mips/include/asm/mach-ralink/spaces.h (limited to 'arch/mips') diff --git a/arch/mips/include/asm/mach-ralink/spaces.h b/arch/mips/include/asm/mach-ralink/spaces.h new file mode 100644 index 000000000000..87d085c9ad61 --- /dev/null +++ b/arch/mips/include/asm/mach-ralink/spaces.h @@ -0,0 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef __ASM_MACH_RALINK_SPACES_H_ +#define __ASM_MACH_RALINK_SPACES_H_ + +#define PCI_IOBASE _AC(0xa0000000, UL) +#define PCI_IOSIZE SZ_16M +#define IO_SPACE_LIMIT (PCI_IOSIZE - 1) + +#include +#endif -- cgit v1.2.3