From 142439b0520a239bc10cf6c87d7773644c5dfe04 Mon Sep 17 00:00:00 2001 From: Thomas Bogendoerfer Date: Mon, 24 Aug 2020 18:32:46 +0200 Subject: MIPS: Remove MIPS4K_ICACHE_REFILL_WAR and MIPS_CACHE_SYNC_WAR Neither MIPS4K_ICACHE_REFILL_WAR nor MIPS_CACHE_SYNC_WAR are implemented, so removing defines for it won't change anything. Signed-off-by: Thomas Bogendoerfer --- arch/mips/include/asm/mach-sibyte/war.h | 2 -- 1 file changed, 2 deletions(-) (limited to 'arch/mips/include/asm/mach-sibyte') diff --git a/arch/mips/include/asm/mach-sibyte/war.h b/arch/mips/include/asm/mach-sibyte/war.h index 78fd2ad4930b..0e18f0753407 100644 --- a/arch/mips/include/asm/mach-sibyte/war.h +++ b/arch/mips/include/asm/mach-sibyte/war.h @@ -24,8 +24,6 @@ extern int sb1250_m3_workaround_needed(void); #endif -#define MIPS4K_ICACHE_REFILL_WAR 0 -#define MIPS_CACHE_SYNC_WAR 0 #define TX49XX_ICACHE_INDEX_INV_WAR 0 #define ICACHE_REFILLS_WORKAROUND_WAR 0 #define R10000_LLSC_WAR 0 -- cgit v1.2.3