From 76148ab8b79e0b40107a96f97e7fd7a0f1f732a1 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Tue, 17 Apr 2012 15:35:01 +1000 Subject: m68knommu: move the 528x platform code into the common ColdFire code directory All these separate directories for each ColdFire CPU SoC varient seems like overkill. The majority of them only contain a single small config file. Move these into the common ColdFire code directory. Signed-off-by: Greg Ungerer --- arch/m68k/platform/528x/Makefile | 18 ----- arch/m68k/platform/528x/config.c | 137 ----------------------------------- arch/m68k/platform/coldfire/Makefile | 2 +- arch/m68k/platform/coldfire/m528x.c | 137 +++++++++++++++++++++++++++++++++++ 4 files changed, 138 insertions(+), 156 deletions(-) delete mode 100644 arch/m68k/platform/528x/Makefile delete mode 100644 arch/m68k/platform/528x/config.c create mode 100644 arch/m68k/platform/coldfire/m528x.c (limited to 'arch/m68k/platform') diff --git a/arch/m68k/platform/528x/Makefile b/arch/m68k/platform/528x/Makefile deleted file mode 100644 index 8755c9e6c66b..000000000000 --- a/arch/m68k/platform/528x/Makefile +++ /dev/null @@ -1,18 +0,0 @@ -# -# Makefile for the linux kernel. -# - -# -# If you want to play with the HW breakpoints then you will -# need to add define this, which will give you a stack backtrace -# on the console port whenever a DBG interrupt occurs. You have to -# set up you HW breakpoints to trigger a DBG interrupt: -# -# ccflags-y := -DTRAP_DBG_INTERRUPT -# asflags-y := -DTRAP_DBG_INTERRUPT -# - -asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1 - -obj-y := config.o - diff --git a/arch/m68k/platform/528x/config.c b/arch/m68k/platform/528x/config.c deleted file mode 100644 index 7ed1276b29dc..000000000000 --- a/arch/m68k/platform/528x/config.c +++ /dev/null @@ -1,137 +0,0 @@ -/***************************************************************************/ - -/* - * linux/arch/m68knommu/platform/528x/config.c - * - * Sub-architcture dependent initialization code for the Freescale - * 5280, 5281 and 5282 CPUs. - * - * Copyright (C) 1999-2003, Greg Ungerer (gerg@snapgear.com) - * Copyright (C) 2001-2003, SnapGear Inc. (www.snapgear.com) - */ - -/***************************************************************************/ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -/***************************************************************************/ - -struct mcf_gpio_chip mcf_gpio_chips[] = { - MCFGPS(NQ, 1, 7, MCFEPORT_EPDDR, MCFEPORT_EPDR, MCFEPORT_EPPDR), - MCFGPS(TA, 8, 4, MCFGPTA_GPTDDR, MCFGPTA_GPTPORT, MCFGPTB_GPTPORT), - MCFGPS(TB, 16, 4, MCFGPTB_GPTDDR, MCFGPTB_GPTPORT, MCFGPTB_GPTPORT), - MCFGPS(QA, 24, 4, MCFQADC_DDRQA, MCFQADC_PORTQA, MCFQADC_PORTQA), - MCFGPS(QB, 32, 4, MCFQADC_DDRQB, MCFQADC_PORTQB, MCFQADC_PORTQB), - MCFGPF(A, 40, 8), - MCFGPF(B, 48, 8), - MCFGPF(C, 56, 8), - MCFGPF(D, 64, 8), - MCFGPF(E, 72, 8), - MCFGPF(F, 80, 8), - MCFGPF(G, 88, 8), - MCFGPF(H, 96, 8), - MCFGPF(J, 104, 8), - MCFGPF(DD, 112, 8), - MCFGPF(EH, 120, 8), - MCFGPF(EL, 128, 8), - MCFGPF(AS, 136, 6), - MCFGPF(QS, 144, 7), - MCFGPF(SD, 152, 6), - MCFGPF(TC, 160, 4), - MCFGPF(TD, 168, 4), - MCFGPF(UA, 176, 4), -}; - -unsigned int mcf_gpio_chips_size = ARRAY_SIZE(mcf_gpio_chips); - -/***************************************************************************/ - -#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) - -static void __init m528x_qspi_init(void) -{ - /* setup Port QS for QSPI with gpio CS control */ - __raw_writeb(0x07, MCFGPIO_PQSPAR); -} - -#endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */ - -/***************************************************************************/ - -static void __init m528x_uarts_init(void) -{ - u8 port; - - /* make sure PUAPAR is set for UART0 and UART1 */ - port = readb(MCF5282_GPIO_PUAPAR); - port |= 0x03 | (0x03 << 2); - writeb(port, MCF5282_GPIO_PUAPAR); -} - -/***************************************************************************/ - -static void __init m528x_fec_init(void) -{ - u16 v16; - - /* Set multi-function pins to ethernet mode for fec0 */ - v16 = readw(MCF_IPSBAR + 0x100056); - writew(v16 | 0xf00, MCF_IPSBAR + 0x100056); - writeb(0xc0, MCF_IPSBAR + 0x100058); -} - -/***************************************************************************/ - -#ifdef CONFIG_WILDFIRE -void wildfire_halt(void) -{ - writeb(0, 0x30000007); - writeb(0x2, 0x30000007); -} -#endif - -#ifdef CONFIG_WILDFIREMOD -void wildfiremod_halt(void) -{ - printk(KERN_INFO "WildFireMod hibernating...\n"); - - /* Set portE.5 to Digital IO */ - MCF5282_GPIO_PEPAR &= ~(1 << (5 * 2)); - - /* Make portE.5 an output */ - MCF5282_GPIO_DDRE |= (1 << 5); - - /* Now toggle portE.5 from low to high */ - MCF5282_GPIO_PORTE &= ~(1 << 5); - MCF5282_GPIO_PORTE |= (1 << 5); - - printk(KERN_EMERG "Failed to hibernate. Halting!\n"); -} -#endif - -void __init config_BSP(char *commandp, int size) -{ -#ifdef CONFIG_WILDFIRE - mach_halt = wildfire_halt; -#endif -#ifdef CONFIG_WILDFIREMOD - mach_halt = wildfiremod_halt; -#endif - mach_sched_init = hw_timer_init; - m528x_uarts_init(); - m528x_fec_init(); -#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) - m528x_qspi_init(); -#endif -} - -/***************************************************************************/ diff --git a/arch/m68k/platform/coldfire/Makefile b/arch/m68k/platform/coldfire/Makefile index 8bef3463de21..cdd884e49f43 100644 --- a/arch/m68k/platform/coldfire/Makefile +++ b/arch/m68k/platform/coldfire/Makefile @@ -22,7 +22,7 @@ obj-$(CONFIG_M523x) += m523x.o pit.o dma_timer.o intc-2.o reset.o obj-$(CONFIG_M5249) += m5249.o timers.o intc.o intc-5249.o reset.o obj-$(CONFIG_M527x) += m527x.o pit.o intc-2.o reset.o obj-$(CONFIG_M5272) += m5272.o intc-5272.o timers.o -obj-$(CONFIG_M528x) += pit.o intc-2.o reset.o +obj-$(CONFIG_M528x) += m528x.o pit.o intc-2.o reset.o obj-$(CONFIG_M5307) += timers.o intc.o reset.o obj-$(CONFIG_M532x) += timers.o intc-simr.o reset.o obj-$(CONFIG_M5407) += timers.o intc.o reset.o diff --git a/arch/m68k/platform/coldfire/m528x.c b/arch/m68k/platform/coldfire/m528x.c new file mode 100644 index 000000000000..7ed1276b29dc --- /dev/null +++ b/arch/m68k/platform/coldfire/m528x.c @@ -0,0 +1,137 @@ +/***************************************************************************/ + +/* + * linux/arch/m68knommu/platform/528x/config.c + * + * Sub-architcture dependent initialization code for the Freescale + * 5280, 5281 and 5282 CPUs. + * + * Copyright (C) 1999-2003, Greg Ungerer (gerg@snapgear.com) + * Copyright (C) 2001-2003, SnapGear Inc. (www.snapgear.com) + */ + +/***************************************************************************/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/***************************************************************************/ + +struct mcf_gpio_chip mcf_gpio_chips[] = { + MCFGPS(NQ, 1, 7, MCFEPORT_EPDDR, MCFEPORT_EPDR, MCFEPORT_EPPDR), + MCFGPS(TA, 8, 4, MCFGPTA_GPTDDR, MCFGPTA_GPTPORT, MCFGPTB_GPTPORT), + MCFGPS(TB, 16, 4, MCFGPTB_GPTDDR, MCFGPTB_GPTPORT, MCFGPTB_GPTPORT), + MCFGPS(QA, 24, 4, MCFQADC_DDRQA, MCFQADC_PORTQA, MCFQADC_PORTQA), + MCFGPS(QB, 32, 4, MCFQADC_DDRQB, MCFQADC_PORTQB, MCFQADC_PORTQB), + MCFGPF(A, 40, 8), + MCFGPF(B, 48, 8), + MCFGPF(C, 56, 8), + MCFGPF(D, 64, 8), + MCFGPF(E, 72, 8), + MCFGPF(F, 80, 8), + MCFGPF(G, 88, 8), + MCFGPF(H, 96, 8), + MCFGPF(J, 104, 8), + MCFGPF(DD, 112, 8), + MCFGPF(EH, 120, 8), + MCFGPF(EL, 128, 8), + MCFGPF(AS, 136, 6), + MCFGPF(QS, 144, 7), + MCFGPF(SD, 152, 6), + MCFGPF(TC, 160, 4), + MCFGPF(TD, 168, 4), + MCFGPF(UA, 176, 4), +}; + +unsigned int mcf_gpio_chips_size = ARRAY_SIZE(mcf_gpio_chips); + +/***************************************************************************/ + +#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) + +static void __init m528x_qspi_init(void) +{ + /* setup Port QS for QSPI with gpio CS control */ + __raw_writeb(0x07, MCFGPIO_PQSPAR); +} + +#endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */ + +/***************************************************************************/ + +static void __init m528x_uarts_init(void) +{ + u8 port; + + /* make sure PUAPAR is set for UART0 and UART1 */ + port = readb(MCF5282_GPIO_PUAPAR); + port |= 0x03 | (0x03 << 2); + writeb(port, MCF5282_GPIO_PUAPAR); +} + +/***************************************************************************/ + +static void __init m528x_fec_init(void) +{ + u16 v16; + + /* Set multi-function pins to ethernet mode for fec0 */ + v16 = readw(MCF_IPSBAR + 0x100056); + writew(v16 | 0xf00, MCF_IPSBAR + 0x100056); + writeb(0xc0, MCF_IPSBAR + 0x100058); +} + +/***************************************************************************/ + +#ifdef CONFIG_WILDFIRE +void wildfire_halt(void) +{ + writeb(0, 0x30000007); + writeb(0x2, 0x30000007); +} +#endif + +#ifdef CONFIG_WILDFIREMOD +void wildfiremod_halt(void) +{ + printk(KERN_INFO "WildFireMod hibernating...\n"); + + /* Set portE.5 to Digital IO */ + MCF5282_GPIO_PEPAR &= ~(1 << (5 * 2)); + + /* Make portE.5 an output */ + MCF5282_GPIO_DDRE |= (1 << 5); + + /* Now toggle portE.5 from low to high */ + MCF5282_GPIO_PORTE &= ~(1 << 5); + MCF5282_GPIO_PORTE |= (1 << 5); + + printk(KERN_EMERG "Failed to hibernate. Halting!\n"); +} +#endif + +void __init config_BSP(char *commandp, int size) +{ +#ifdef CONFIG_WILDFIRE + mach_halt = wildfire_halt; +#endif +#ifdef CONFIG_WILDFIREMOD + mach_halt = wildfiremod_halt; +#endif + mach_sched_init = hw_timer_init; + m528x_uarts_init(); + m528x_fec_init(); +#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) + m528x_qspi_init(); +#endif +} + +/***************************************************************************/ -- cgit v1.2.3