From 6a01f230339321292cf065551f8cf55361052461 Mon Sep 17 00:00:00 2001 From: Yi Li Date: Wed, 7 Jan 2009 23:14:39 +0800 Subject: Blackfin arch: merge adeos blackfin part to arch/blackfin/ [Mike Frysinger : - handle bf531/bf532/bf534/bf536 variants in ipipe.h - cleanup IPIPE logic for bfin_set_irq_handler() - cleanup ipipe asm code a bit and add missing ENDPROC() - simplify IPIPE code in trap_c - unify some of the IPIPE code and fix style - simplify DO_IRQ_L1 handling with ipipe code - revert IRQ_SW_INT# addition from ipipe merge - remove duplicate get_{c,s}clk() prototypes ] Signed-off-by: Yi Li Signed-off-by: Mike Frysinger Signed-off-by: Bryan Wu --- arch/blackfin/mach-bf561/Kconfig | 2 +- arch/blackfin/mach-bf561/include/mach/cdefBF561.h | 8 ++++---- 2 files changed, 5 insertions(+), 5 deletions(-) (limited to 'arch/blackfin/mach-bf561') diff --git a/arch/blackfin/mach-bf561/Kconfig b/arch/blackfin/mach-bf561/Kconfig index 5d56438cad2f..638ec38ca470 100644 --- a/arch/blackfin/mach-bf561/Kconfig +++ b/arch/blackfin/mach-bf561/Kconfig @@ -138,7 +138,7 @@ config IRQ_DMA2_11 default 9 config IRQ_TIMER0 int "TIMER 0 Interrupt" - default 10 + default 8 config IRQ_TIMER1 int "TIMER 1 Interrupt" default 10 diff --git a/arch/blackfin/mach-bf561/include/mach/cdefBF561.h b/arch/blackfin/mach-bf561/include/mach/cdefBF561.h index b16875d735b3..95d609f11c97 100644 --- a/arch/blackfin/mach-bf561/include/mach/cdefBF561.h +++ b/arch/blackfin/mach-bf561/include/mach/cdefBF561.h @@ -1537,7 +1537,7 @@ static __inline__ void bfin_write_PLL_CTL(unsigned int val) if (val == bfin_read_PLL_CTL()) return; - local_irq_save(flags); + local_irq_save_hw(flags); /* Enable the PLL Wakeup bit in SIC IWR */ iwr0 = bfin_read32(SICA_IWR0); iwr1 = bfin_read32(SICA_IWR1); @@ -1551,7 +1551,7 @@ static __inline__ void bfin_write_PLL_CTL(unsigned int val) bfin_write32(SICA_IWR0, iwr0); bfin_write32(SICA_IWR1, iwr1); - local_irq_restore(flags); + local_irq_restore_hw(flags); } /* Writing to VR_CTL initiates a PLL relock sequence. */ @@ -1562,7 +1562,7 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val) if (val == bfin_read_VR_CTL()) return; - local_irq_save(flags); + local_irq_save_hw(flags); /* Enable the PLL Wakeup bit in SIC IWR */ iwr0 = bfin_read32(SICA_IWR0); iwr1 = bfin_read32(SICA_IWR1); @@ -1576,7 +1576,7 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val) bfin_write32(SICA_IWR0, iwr0); bfin_write32(SICA_IWR1, iwr1); - local_irq_restore(flags); + local_irq_restore_hw(flags); } #endif /* _CDEF_BF561_H */ -- cgit v1.2.3