From d8304aa2ebc775db9caa9064d8ea911b18247206 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 23 Sep 2019 18:15:12 +0200 Subject: ARM: dts: exynos: Remove MCT subnode for interrupt map on Exynos4210 Multi Core Timer node has interrupts routed to two different parents - GIC and combiner. This was modeled with a interrupt-map within a subnode but can be expressed in an easier and more common way, directly in the node itself. Signed-off-by: Krzysztof Kozlowski Tested-by: Marek Szyprowski --- arch/arm/boot/dts/exynos4210.dtsi | 21 ++++++--------------- 1 file changed, 6 insertions(+), 15 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi index 6d3f19562aab..5fa33d43821e 100644 --- a/arch/arm/boot/dts/exynos4210.dtsi +++ b/arch/arm/boot/dts/exynos4210.dtsi @@ -109,23 +109,14 @@ mct: timer@10050000 { compatible = "samsung,exynos4210-mct"; reg = <0x10050000 0x800>; - interrupt-parent = <&mct_map>; - interrupts = <0>, <1>, <2>, <3>, <4>, <5>; clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>; clock-names = "fin_pll", "mct"; - - mct_map: mct-map { - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = - <0 &gic 0 57 IRQ_TYPE_LEVEL_HIGH>, - <1 &gic 0 69 IRQ_TYPE_LEVEL_HIGH>, - <2 &combiner 12 6>, - <3 &combiner 12 7>, - <4 &gic 0 42 IRQ_TYPE_LEVEL_HIGH>, - <5 &gic 0 48 IRQ_TYPE_LEVEL_HIGH>; - }; + interrupts-extended = <&gic 0 57 IRQ_TYPE_LEVEL_HIGH>, + <&gic 0 69 IRQ_TYPE_LEVEL_HIGH>, + <&combiner 12 6>, + <&combiner 12 7>, + <&gic 0 42 IRQ_TYPE_LEVEL_HIGH>, + <&gic 0 48 IRQ_TYPE_LEVEL_HIGH>; }; watchdog: watchdog@10060000 { -- cgit v1.2.3