From 4e962e8998cc6cb5e58beae5feb6a65cb1a27f26 Mon Sep 17 00:00:00 2001 From: Tarun Kanti DebBarma Date: Fri, 27 Apr 2012 19:43:37 +0530 Subject: gpio/omap: remove cpu_is_omapxxxx() checks from *_runtime_resume() Add register offsets for GPIO_IRQSTATUS_RAW_0, GPIO_IRQSTATUS_RAW_0 which are present on OMAP4+ processors. Now we can distinguish conditions applicable to OMAP4,5 and those specific to OMAP24xx and OMAP3xxx. Cc: Kevin Hilman Cc: Tony Lindgren Cc: Santosh Shilimkar Cc: Cousson, Benoit Cc: Grant Likely Signed-off-by: Tarun Kanti DebBarma Reviewed-by: Santosh Shilimkar Tested-by: Govindraj.R Signed-off-by: Kevin Hilman --- arch/arm/mach-omap2/gpio.c | 2 ++ arch/arm/plat-omap/include/plat/gpio.h | 2 ++ 2 files changed, 4 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c index 86f91a6ed4e4..a144e22969a3 100644 --- a/arch/arm/mach-omap2/gpio.c +++ b/arch/arm/mach-omap2/gpio.c @@ -101,6 +101,8 @@ static int __init omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused) pdata->regs->dataout = OMAP4_GPIO_DATAOUT; pdata->regs->set_dataout = OMAP4_GPIO_SETDATAOUT; pdata->regs->clr_dataout = OMAP4_GPIO_CLEARDATAOUT; + pdata->regs->irqstatus_raw0 = OMAP4_GPIO_IRQSTATUSRAW0; + pdata->regs->irqstatus_raw1 = OMAP4_GPIO_IRQSTATUSRAW1; pdata->regs->irqstatus = OMAP4_GPIO_IRQSTATUS0; pdata->regs->irqstatus2 = OMAP4_GPIO_IRQSTATUS1; pdata->regs->irqenable = OMAP4_GPIO_IRQSTATUSSET0; diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h index d903e7df3fb1..50fb7cc000ea 100644 --- a/arch/arm/plat-omap/include/plat/gpio.h +++ b/arch/arm/plat-omap/include/plat/gpio.h @@ -172,6 +172,8 @@ struct omap_gpio_reg_offs { u16 clr_dataout; u16 irqstatus; u16 irqstatus2; + u16 irqstatus_raw0; + u16 irqstatus_raw1; u16 irqenable; u16 irqenable2; u16 set_irqenable; -- cgit v1.2.3