From edfaf05c2fcb853fcf35f12aeb9c340f5913337f Mon Sep 17 00:00:00 2001 From: Victor Kamensky Date: Tue, 15 Apr 2014 20:37:46 +0300 Subject: ARM: OMAP2+: raw read and write endian fix All OMAP IP blocks expect LE data, but CPU may operate in BE mode. Need to use endian neutral functions to read/write h/w registers. I.e instead of __raw_read[lw] and __raw_write[lw] functions code need to use read[lw]_relaxed and write[lw]_relaxed functions. If the first simply reads/writes register, the second will byteswap it if host operates in BE mode. Changes are trivial sed like replacement of __raw_xxx functions with xxx_relaxed variant. Signed-off-by: Victor Kamensky Signed-off-by: Taras Kondratiuk Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/prm2xxx.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/mach-omap2/prm2xxx.h') diff --git a/arch/arm/mach-omap2/prm2xxx.h b/arch/arm/mach-omap2/prm2xxx.h index 3194dd87e0e4..d2cb6365716f 100644 --- a/arch/arm/mach-omap2/prm2xxx.h +++ b/arch/arm/mach-omap2/prm2xxx.h @@ -27,7 +27,7 @@ /* * OMAP2-specific global PRM registers - * Use __raw_{read,write}l() with these registers. + * Use {read,write}l_relaxed() with these registers. * * With a few exceptions, these are the register names beginning with * PRCM_* on 24xx. (The exceptions are the IRQSTATUS and IRQENABLE -- cgit v1.2.3